From a3b754b662cd29449179e91a76d03891450be6c3 Mon Sep 17 00:00:00 2001 From: authmillenon Date: Thu, 15 Aug 2013 10:17:15 +0200 Subject: [PATCH] Remove carriage returns Git for windows handles those by itself --- cpu/arm_common/include/VIC.h | 192 +-- cpu/lpc2387/asmfunc.s | 192 +-- cpu/lpc2387/include/lpc23xx.h | 2262 +++++++++++++++--------------- doc/doxygen/src/riot-footer.html | 4 +- sys/net/destiny/destiny.h | 26 +- sys/net/destiny/in.h | 266 ++-- sys/net/destiny/socket.h | 496 +++---- sys/net/destiny/tcp.h | 228 +-- sys/net/destiny/tcp_hc.c | 1266 ++++++++--------- sys/net/destiny/tcp_hc.h | 50 +- sys/net/destiny/tcp_timer.c | 312 ++--- sys/net/destiny/tcp_timer.h | 66 +- sys/net/destiny/udp.c | 154 +- sys/net/destiny/udp.h | 88 +- sys/net/net_help/msg_help.c | 88 +- sys/net/net_help/msg_help.h | 70 +- sys/net/net_help/net_help.c | 122 +- sys/net/net_help/net_help.h | 54 +- 18 files changed, 2968 insertions(+), 2968 deletions(-) diff --git a/cpu/arm_common/include/VIC.h b/cpu/arm_common/include/VIC.h index 1a3ccee2b..6083887ec 100644 --- a/cpu/arm_common/include/VIC.h +++ b/cpu/arm_common/include/VIC.h @@ -1,96 +1,96 @@ -/* Copyright (C) 2005, 2006, 2007, 2008 by Thomas Hillebrandt and Heiko Will - -This file is part of the Micro-mesh SensorWeb Firmware. - -Micro-Mesh is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 3, or (at your option) -any later version. - -Micro-Mesh is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with Micro-Mesh; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#ifndef __ARM_COMMON_H -#define __ARM_COMMON_H - -/** - * @ingroup arm_common - * @{ - */ - -#define I_Bit 0x80 -#define F_Bit 0x40 - -#define SYS32Mode 0x1F -#define IRQ32Mode 0x12 -#define FIQ32Mode 0x11 - -#define INTMode (FIQ32Mode | IRQ32Mode) - - -/** - * @name IRQ Priority Mapping - */ -//@{ -#define HIGHEST_PRIORITY 0x01 -#define IRQP_RTIMER 1 // FIQ_PRIORITY // TODO: investigate problems with rtimer and FIQ -#define IRQP_TIMER1 1 -#define IRQP_WATCHDOG 1 -#define IRQP_CLOCK 3 -#define IRQP_GPIO 4 -#define IRQP_RTC 8 -#define LOWEST_PRIORITY 0x0F -// @} - - -#define WDT_INT 0 -#define SWI_INT 1 -#define ARM_CORE0_INT 2 -#define ARM_CORE1_INT 3 -#define TIMER0_INT 4 -#define TIMER1_INT 5 -#define UART0_INT 6 -#define UART1_INT 7 -#define PWM0_1_INT 8 -#define I2C0_INT 9 -#define SPI0_INT 10 /* SPI and SSP0 share VIC slot */ -#define SSP0_INT 10 -#define SSP1_INT 11 -#define PLL_INT 12 -#define RTC_INT 13 -#define EINT0_INT 14 -#define EINT1_INT 15 -#define EINT2_INT 16 -#define EINT3_INT 17 -#define ADC0_INT 18 -#define I2C1_INT 19 -#define BOD_INT 20 -#define EMAC_INT 21 -#define USB_INT 22 -#define CAN_INT 23 -#define MCI_INT 24 -#define GPDMA_INT 25 -#define TIMER2_INT 26 -#define TIMER3_INT 27 -#define UART2_INT 28 -#define UART3_INT 29 -#define I2C2_INT 30 -#define I2S_INT 31 - -#define VECT_ADDR_INDEX 0x100 -#define VECT_CNTL_INDEX 0x200 - -#include -#include "cpu.h" - -bool cpu_install_irq(int IntNumber, void *HandlerAddr, int Priority); - -/** @} */ -#endif /*ARMVIC_H_*/ +/* Copyright (C) 2005, 2006, 2007, 2008 by Thomas Hillebrandt and Heiko Will + +This file is part of the Micro-mesh SensorWeb Firmware. + +Micro-Mesh is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +Micro-Mesh is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with Micro-Mesh; see the file COPYING. If not, write to +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ + +#ifndef __ARM_COMMON_H +#define __ARM_COMMON_H + +/** + * @ingroup arm_common + * @{ + */ + +#define I_Bit 0x80 +#define F_Bit 0x40 + +#define SYS32Mode 0x1F +#define IRQ32Mode 0x12 +#define FIQ32Mode 0x11 + +#define INTMode (FIQ32Mode | IRQ32Mode) + + +/** + * @name IRQ Priority Mapping + */ +//@{ +#define HIGHEST_PRIORITY 0x01 +#define IRQP_RTIMER 1 // FIQ_PRIORITY // TODO: investigate problems with rtimer and FIQ +#define IRQP_TIMER1 1 +#define IRQP_WATCHDOG 1 +#define IRQP_CLOCK 3 +#define IRQP_GPIO 4 +#define IRQP_RTC 8 +#define LOWEST_PRIORITY 0x0F +// @} + + +#define WDT_INT 0 +#define SWI_INT 1 +#define ARM_CORE0_INT 2 +#define ARM_CORE1_INT 3 +#define TIMER0_INT 4 +#define TIMER1_INT 5 +#define UART0_INT 6 +#define UART1_INT 7 +#define PWM0_1_INT 8 +#define I2C0_INT 9 +#define SPI0_INT 10 /* SPI and SSP0 share VIC slot */ +#define SSP0_INT 10 +#define SSP1_INT 11 +#define PLL_INT 12 +#define RTC_INT 13 +#define EINT0_INT 14 +#define EINT1_INT 15 +#define EINT2_INT 16 +#define EINT3_INT 17 +#define ADC0_INT 18 +#define I2C1_INT 19 +#define BOD_INT 20 +#define EMAC_INT 21 +#define USB_INT 22 +#define CAN_INT 23 +#define MCI_INT 24 +#define GPDMA_INT 25 +#define TIMER2_INT 26 +#define TIMER3_INT 27 +#define UART2_INT 28 +#define UART3_INT 29 +#define I2C2_INT 30 +#define I2S_INT 31 + +#define VECT_ADDR_INDEX 0x100 +#define VECT_CNTL_INDEX 0x200 + +#include +#include "cpu.h" + +bool cpu_install_irq(int IntNumber, void *HandlerAddr, int Priority); + +/** @} */ +#endif /*ARMVIC_H_*/ diff --git a/cpu/lpc2387/asmfunc.s b/cpu/lpc2387/asmfunc.s index 4bdb45468..d61c6d6ca 100644 --- a/cpu/lpc2387/asmfunc.s +++ b/cpu/lpc2387/asmfunc.s @@ -1,96 +1,96 @@ -@-----------------------------------------------------------@ -@ Fast Block Copy (declared in diskio.h) -@-----------------------------------------------------------@ - -.global Copy_un2al -.arm -Copy_un2al: - STMFD SP!, {R4-R8} - ANDS IP, R1, #3 - BEQ lb_align - - BIC R1, #3 - MOV IP, IP, LSL #3 - RSB R8, IP, #32 - LDMIA R1!, {R7} -lb_l1: MOV R3, R7 - LDMIA R1!, {R4-R7} - MOV R3, R3, LSR IP - ORR R3, R3, R4, LSL R8 - MOV R4, R4, LSR IP - ORR R4, R4, R5, LSL R8 - MOV R5, R5, LSR IP - ORR R5, R5, R6, LSL R8 - MOV R6, R6, LSR IP - ORR R6, R6, R7, LSL R8 - SUBS R2, R2, #16 - STMIA R0!, {R3-R6} - BNE lb_l1 - LDMFD SP!, {R4-R8} - BX LR - -lb_align: - LDMIA R1!, {R3-R6} - SUBS R2, R2, #16 - STMIA R0!, {R3-R6} - BNE lb_align - LDMFD SP!, {R4-R8} - BX LR - - -.global Copy_al2un -.arm -Copy_al2un: - STMFD SP!, {R4-R8} - ANDS IP, R0, #3 - BEQ sb_align - - MOV IP, IP, LSL #3 - RSB R8, IP, #32 - - LDMIA R1!, {R4-R7} -sb_p1: STRB R4, [R0], #1 - MOV R4, R4, LSR #8 - TST R0, #3 - BNE sb_p1 - ORR R4, R4, R5, LSL IP - MOV R5, R5, LSR R8 - ORR R5, R5, R6, LSL IP - MOV R6, R6, LSR R8 - ORR R6, R6, R7, LSL IP - SUBS R2, R2, #16 - STMIA R0!, {R4-R6} - -sb_l1: MOV R3, R7 - LDMIA R1!, {R4-R7} - MOV R3, R3, LSR R8 - ORR R3, R3, R4, LSL IP - MOV R4, R4, LSR R8 - ORR R4, R4, R5, LSL IP - MOV R5, R5, LSR R8 - ORR R5, R5, R6, LSL IP - MOV R6, R6, LSR R8 - ORR R6, R6, R7, LSL IP - SUBS R2, R2, #16 - STMIA R0!, {R3-R6} - BNE sb_l1 - - MOV R7, R7, LSR R8 -sb_p2: SUBS IP, IP, #8 - STRB R7, [R0], #1 - MOV R7, R7, LSR #8 - BNE sb_p2 - - LDMFD SP!, {R4-R8} - BX LR - -sb_align: - LDMIA R1!, {R3-R6} - SUBS R2, #16 - STMIA R0!, {R3-R6} - BNE sb_align - LDMFD SP!, {R4-R8} - BX LR - -.end - +@-----------------------------------------------------------@ +@ Fast Block Copy (declared in diskio.h) +@-----------------------------------------------------------@ + +.global Copy_un2al +.arm +Copy_un2al: + STMFD SP!, {R4-R8} + ANDS IP, R1, #3 + BEQ lb_align + + BIC R1, #3 + MOV IP, IP, LSL #3 + RSB R8, IP, #32 + LDMIA R1!, {R7} +lb_l1: MOV R3, R7 + LDMIA R1!, {R4-R7} + MOV R3, R3, LSR IP + ORR R3, R3, R4, LSL R8 + MOV R4, R4, LSR IP + ORR R4, R4, R5, LSL R8 + MOV R5, R5, LSR IP + ORR R5, R5, R6, LSL R8 + MOV R6, R6, LSR IP + ORR R6, R6, R7, LSL R8 + SUBS R2, R2, #16 + STMIA R0!, {R3-R6} + BNE lb_l1 + LDMFD SP!, {R4-R8} + BX LR + +lb_align: + LDMIA R1!, {R3-R6} + SUBS R2, R2, #16 + STMIA R0!, {R3-R6} + BNE lb_align + LDMFD SP!, {R4-R8} + BX LR + + +.global Copy_al2un +.arm +Copy_al2un: + STMFD SP!, {R4-R8} + ANDS IP, R0, #3 + BEQ sb_align + + MOV IP, IP, LSL #3 + RSB R8, IP, #32 + + LDMIA R1!, {R4-R7} +sb_p1: STRB R4, [R0], #1 + MOV R4, R4, LSR #8 + TST R0, #3 + BNE sb_p1 + ORR R4, R4, R5, LSL IP + MOV R5, R5, LSR R8 + ORR R5, R5, R6, LSL IP + MOV R6, R6, LSR R8 + ORR R6, R6, R7, LSL IP + SUBS R2, R2, #16 + STMIA R0!, {R4-R6} + +sb_l1: MOV R3, R7 + LDMIA R1!, {R4-R7} + MOV R3, R3, LSR R8 + ORR R3, R3, R4, LSL IP + MOV R4, R4, LSR R8 + ORR R4, R4, R5, LSL IP + MOV R5, R5, LSR R8 + ORR R5, R5, R6, LSL IP + MOV R6, R6, LSR R8 + ORR R6, R6, R7, LSL IP + SUBS R2, R2, #16 + STMIA R0!, {R3-R6} + BNE sb_l1 + + MOV R7, R7, LSR R8 +sb_p2: SUBS IP, IP, #8 + STRB R7, [R0], #1 + MOV R7, R7, LSR #8 + BNE sb_p2 + + LDMFD SP!, {R4-R8} + BX LR + +sb_align: + LDMIA R1!, {R3-R6} + SUBS R2, #16 + STMIA R0!, {R3-R6} + BNE sb_align + LDMFD SP!, {R4-R8} + BX LR + +.end + diff --git a/cpu/lpc2387/include/lpc23xx.h b/cpu/lpc2387/include/lpc23xx.h index 269393bdd..84e026774 100644 --- a/cpu/lpc2387/include/lpc23xx.h +++ b/cpu/lpc2387/include/lpc23xx.h @@ -1,1131 +1,1131 @@ -/****************************************************************************** - * LPC23xx.h: Header file for NXP LPC23xx/24xx Family Microprocessors - * The header file is the super set of all hardware definition of the - * peripherals for the LPC23xx/24xx family microprocessor. - * - * Copyright(C) 2006, NXP Semiconductor - * All rights reserved. - * - * History - * 2005.10.01 ver 1.00 Prelimnary version, first Release - * 2007.05.17 ver 1.01 several corrections - * -******************************************************************************/ - -#ifndef __LPC23xx_H -#define __LPC23xx_H - -/* Vectored Interrupt Controller (VIC) */ -#define VIC_BASE_ADDR 0xFFFFF000 -#define VICIRQStatus (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x000)) -#define VICFIQStatus (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x004)) -#define VICRawIntr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x008)) -#define VICIntSelect (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x00C)) -#define VICIntEnable (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x010)) -#define VICIntEnClr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x014)) -#define VICSoftInt (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x018)) -#define VICSoftIntClr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x01C)) -#define VICProtection (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x020)) -#define VICSWPrioMask (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x024)) - -#define VICVectAddr0 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x100)) -#define VICVectAddr1 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x104)) -#define VICVectAddr2 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x108)) -#define VICVectAddr3 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x10C)) -#define VICVectAddr4 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x110)) -#define VICVectAddr5 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x114)) -#define VICVectAddr6 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x118)) -#define VICVectAddr7 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x11C)) -#define VICVectAddr8 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x120)) -#define VICVectAddr9 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x124)) -#define VICVectAddr10 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x128)) -#define VICVectAddr11 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x12C)) -#define VICVectAddr12 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x130)) -#define VICVectAddr13 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x134)) -#define VICVectAddr14 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x138)) -#define VICVectAddr15 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x13C)) -#define VICVectAddr16 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x140)) -#define VICVectAddr17 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x144)) -#define VICVectAddr18 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x148)) -#define VICVectAddr19 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x14C)) -#define VICVectAddr20 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x150)) -#define VICVectAddr21 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x154)) -#define VICVectAddr22 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x158)) -#define VICVectAddr23 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x15C)) -#define VICVectAddr24 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x160)) -#define VICVectAddr25 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x164)) -#define VICVectAddr26 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x168)) -#define VICVectAddr27 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x16C)) -#define VICVectAddr28 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x170)) -#define VICVectAddr29 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x174)) -#define VICVectAddr30 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x178)) -#define VICVectAddr31 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x17C)) - -/* The name convention below is from previous LPC2000 family MCUs, in LPC23xx/24xx, -these registers are known as "VICVectPriority(x)". */ -#define VICVectCntl0 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x200)) -#define VICVectCntl1 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x204)) -#define VICVectCntl2 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x208)) -#define VICVectCntl3 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x20C)) -#define VICVectCntl4 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x210)) -#define VICVectCntl5 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x214)) -#define VICVectCntl6 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x218)) -#define VICVectCntl7 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x21C)) -#define VICVectCntl8 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x220)) -#define VICVectCntl9 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x224)) -#define VICVectCntl10 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x228)) -#define VICVectCntl11 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x22C)) -#define VICVectCntl12 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x230)) -#define VICVectCntl13 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x234)) -#define VICVectCntl14 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x238)) -#define VICVectCntl15 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x23C)) -#define VICVectCntl16 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x240)) -#define VICVectCntl17 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x244)) -#define VICVectCntl18 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x248)) -#define VICVectCntl19 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x24C)) -#define VICVectCntl20 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x250)) -#define VICVectCntl21 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x254)) -#define VICVectCntl22 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x258)) -#define VICVectCntl23 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x25C)) -#define VICVectCntl24 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x260)) -#define VICVectCntl25 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x264)) -#define VICVectCntl26 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x268)) -#define VICVectCntl27 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x26C)) -#define VICVectCntl28 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x270)) -#define VICVectCntl29 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x274)) -#define VICVectCntl30 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x278)) -#define VICVectCntl31 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x27C)) - -#define VICVectAddr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0xF00)) - - -/* Pin Connect Block */ -#define PINSEL_BASE_ADDR 0xE002C000 -#define PINSEL0 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x00)) -#define PINSEL1 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x04)) -#define PINSEL2 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x08)) -#define PINSEL3 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x0C)) -#define PINSEL4 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x10)) -#define PINSEL5 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x14)) -#define PINSEL6 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x18)) -#define PINSEL7 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x1C)) -#define PINSEL8 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x20)) -#define PINSEL9 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x24)) -#define PINSEL10 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x28)) - -#define PINMODE0 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x40)) -#define PINMODE1 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x44)) -#define PINMODE2 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x48)) -#define PINMODE3 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x4C)) -#define PINMODE4 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x50)) -#define PINMODE5 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x54)) -#define PINMODE6 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x58)) -#define PINMODE7 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x5C)) -#define PINMODE8 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x60)) -#define PINMODE9 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x64)) - -/* General Purpose Input/Output (GPIO) */ -#define GPIO_BASE_ADDR 0xE0028000 -#define IOPIN0 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x00)) -#define IOSET0 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x04)) -#define IODIR0 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x08)) -#define IOCLR0 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x0C)) -#define IOPIN1 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x10)) -#define IOSET1 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x14)) -#define IODIR1 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x18)) -#define IOCLR1 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x1C)) - -/* GPIO Interrupt Registers */ -#define IO0_INT_EN_R (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x90)) -#define IO0_INT_EN_F (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x94)) -#define IO0_INT_STAT_R (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x84)) -#define IO0_INT_STAT_F (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x88)) -#define IO0_INT_CLR (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x8C)) - -#define IO2_INT_EN_R (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xB0)) -#define IO2_INT_EN_F (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xB4)) -#define IO2_INT_STAT_R (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xA4)) -#define IO2_INT_STAT_F (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xA8)) -#define IO2_INT_CLR (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xAC)) - -#define IO_INT_STAT (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x80)) - -#define PARTCFG_BASE_ADDR 0x3FFF8000 -#define PARTCFG (*(volatile unsigned long *)(PARTCFG_BASE_ADDR + 0x00)) - -/* Fast I/O setup */ -#define FIO_BASE_ADDR 0x3FFFC000 -#define FIO0DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x00)) -#define FIO0MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x10)) -#define FIO0PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x14)) -#define FIO0SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x18)) -#define FIO0CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x1C)) - -#define FIO1DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x20)) -#define FIO1MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x30)) -#define FIO1PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x34)) -#define FIO1SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x38)) -#define FIO1CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x3C)) - -#define FIO2DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x40)) -#define FIO2MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x50)) -#define FIO2PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x54)) -#define FIO2SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x58)) -#define FIO2CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x5C)) - -#define FIO3DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x60)) -#define FIO3MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x70)) -#define FIO3PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x74)) -#define FIO3SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x78)) -#define FIO3CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x7C)) - -#define FIO4DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x80)) -#define FIO4MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x90)) -#define FIO4PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x94)) -#define FIO4SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x98)) -#define FIO4CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x9C)) - -/* FIOs can be accessed through WORD, HALF-WORD or BYTE. */ -#define FIO0DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x00)) -#define FIO1DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x20)) -#define FIO2DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x40)) -#define FIO3DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x60)) -#define FIO4DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x80)) - -#define FIO0DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x01)) -#define FIO1DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x21)) -#define FIO2DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x41)) -#define FIO3DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x61)) -#define FIO4DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x81)) - -#define FIO0DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x02)) -#define FIO1DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x22)) -#define FIO2DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x42)) -#define FIO3DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x62)) -#define FIO4DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x82)) - -#define FIO0DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x03)) -#define FIO1DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x23)) -#define FIO2DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x43)) -#define FIO3DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x63)) -#define FIO4DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x83)) - -#define FIO0DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x00)) -#define FIO1DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x20)) -#define FIO2DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x40)) -#define FIO3DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x60)) -#define FIO4DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x80)) - -#define FIO0DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x02)) -#define FIO1DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x22)) -#define FIO2DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x42)) -#define FIO3DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x62)) -#define FIO4DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x82)) - -#define FIO0MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x10)) -#define FIO1MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x30)) -#define FIO2MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x50)) -#define FIO3MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x70)) -#define FIO4MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x90)) - -#define FIO0MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x11)) -#define FIO1MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x21)) -#define FIO2MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x51)) -#define FIO3MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x71)) -#define FIO4MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x91)) - -#define FIO0MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x12)) -#define FIO1MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x32)) -#define FIO2MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x52)) -#define FIO3MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x72)) -#define FIO4MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x92)) - -#define FIO0MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x13)) -#define FIO1MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x33)) -#define FIO2MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x53)) -#define FIO3MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x73)) -#define FIO4MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x93)) - -#define FIO0MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x10)) -#define FIO1MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x30)) -#define FIO2MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x50)) -#define FIO3MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x70)) -#define FIO4MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x90)) - -#define FIO0MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x12)) -#define FIO1MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x32)) -#define FIO2MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x52)) -#define FIO3MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x72)) -#define FIO4MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x92)) - -#define FIO0PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x14)) -#define FIO1PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x34)) -#define FIO2PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x54)) -#define FIO3PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x74)) -#define FIO4PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x94)) - -#define FIO0PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x15)) -#define FIO1PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x25)) -#define FIO2PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x55)) -#define FIO3PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x75)) -#define FIO4PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x95)) - -#define FIO0PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x16)) -#define FIO1PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x36)) -#define FIO2PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x56)) -#define FIO3PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x76)) -#define FIO4PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x96)) - -#define FIO0PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x17)) -#define FIO1PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x37)) -#define FIO2PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x57)) -#define FIO3PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x77)) -#define FIO4PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x97)) - -#define FIO0PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x14)) -#define FIO1PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x34)) -#define FIO2PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x54)) -#define FIO3PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x74)) -#define FIO4PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x94)) - -#define FIO0PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x16)) -#define FIO1PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x36)) -#define FIO2PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x56)) -#define FIO3PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x76)) -#define FIO4PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x96)) - -#define FIO0SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x18)) -#define FIO1SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x38)) -#define FIO2SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x58)) -#define FIO3SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x78)) -#define FIO4SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x98)) - -#define FIO0SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x19)) -#define FIO1SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x29)) -#define FIO2SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x59)) -#define FIO3SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x79)) -#define FIO4SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x99)) - -#define FIO0SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1A)) -#define FIO1SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3A)) -#define FIO2SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5A)) -#define FIO3SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7A)) -#define FIO4SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9A)) - -#define FIO0SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1B)) -#define FIO1SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3B)) -#define FIO2SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5B)) -#define FIO3SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7B)) -#define FIO4SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9B)) - -#define FIO0SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x18)) -#define FIO1SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x38)) -#define FIO2SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x58)) -#define FIO3SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x78)) -#define FIO4SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x98)) - -#define FIO0SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1A)) -#define FIO1SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3A)) -#define FIO2SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5A)) -#define FIO3SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7A)) -#define FIO4SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9A)) - -#define FIO0CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1C)) -#define FIO1CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3C)) -#define FIO2CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5C)) -#define FIO3CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7C)) -#define FIO4CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9C)) - -#define FIO0CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1D)) -#define FIO1CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x2D)) -#define FIO2CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5D)) -#define FIO3CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7D)) -#define FIO4CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9D)) - -#define FIO0CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1E)) -#define FIO1CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3E)) -#define FIO2CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5E)) -#define FIO3CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7E)) -#define FIO4CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9E)) - -#define FIO0CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1F)) -#define FIO1CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3F)) -#define FIO2CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5F)) -#define FIO3CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7F)) -#define FIO4CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9F)) - -#define FIO0CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1C)) -#define FIO1CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3C)) -#define FIO2CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5C)) -#define FIO3CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7C)) -#define FIO4CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9C)) - -#define FIO0CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1E)) -#define FIO1CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3E)) -#define FIO2CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5E)) -#define FIO3CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7E)) -#define FIO4CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9E)) - - -/* System Control Block(SCB) modules include Memory Accelerator Module, -Phase Locked Loop, VPB divider, Power Control, External Interrupt, -Reset, and Code Security/Debugging */ -#define SCB_BASE_ADDR 0xE01FC000 - -/* Memory Accelerator Module (MAM) */ -#define MAMCR (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x000)) -#define MAMTIM (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x004)) -#define MEMMAP (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x040)) - -/* Phase Locked Loop (PLL) */ -#define PLLCON (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x080)) -#define PLLCFG (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x084)) -#define PLLSTAT (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x088)) -#define PLLFEED (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x08C)) - -/* Power Control */ -#define PCON (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C0)) -#define PCONP (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C4)) - -/* Clock Divider */ -// #define APBDIV (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x100)) -#define CCLKCFG (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x104)) -#define USBCLKCFG (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x108)) -#define CLKSRCSEL (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x10C)) -#define PCLKSEL0 (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1A8)) -#define PCLKSEL1 (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1AC)) - -/* External Interrupts */ -#define EXTINT (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x140)) -#define INTWAKE (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x144)) -#define EXTMODE (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x148)) -#define EXTPOLAR (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x14C)) - -/* Reset, reset source identification */ -#define RSIR (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x180)) - -/* RSID, code security protection */ -#define CSPR (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x184)) - -/* AHB configuration */ -#define AHBCFG1 (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x188)) -#define AHBCFG2 (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x18C)) - -/* System Controls and Status */ -#define SCS (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1A0)) - -/* MPMC(EMC) registers, note: all the external memory controller(EMC) registers -are for LPC24xx only. */ -#define STATIC_MEM0_BASE 0x80000000 -#define STATIC_MEM1_BASE 0x81000000 -#define STATIC_MEM2_BASE 0x82000000 -#define STATIC_MEM3_BASE 0x83000000 - -#define DYNAMIC_MEM0_BASE 0xA0000000 -#define DYNAMIC_MEM1_BASE 0xB0000000 -#define DYNAMIC_MEM2_BASE 0xC0000000 -#define DYNAMIC_MEM3_BASE 0xD0000000 - -/* External Memory Controller (EMC) */ -#define EMC_BASE_ADDR 0xFFE08000 -#define EMC_CTRL (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x000)) -#define EMC_STAT (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x004)) -#define EMC_CONFIG (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x008)) - -/* Dynamic RAM access registers */ -#define EMC_DYN_CTRL (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x020)) -#define EMC_DYN_RFSH (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x024)) -#define EMC_DYN_RD_CFG (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x028)) -#define EMC_DYN_RP (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x030)) -#define EMC_DYN_RAS (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x034)) -#define EMC_DYN_SREX (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x038)) -#define EMC_DYN_APR (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x03C)) -#define EMC_DYN_DAL (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x040)) -#define EMC_DYN_WR (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x044)) -#define EMC_DYN_RC (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x048)) -#define EMC_DYN_RFC (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x04C)) -#define EMC_DYN_XSR (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x050)) -#define EMC_DYN_RRD (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x054)) -#define EMC_DYN_MRD (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x058)) - -#define EMC_DYN_CFG0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x100)) -#define EMC_DYN_RASCAS0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x104)) -#define EMC_DYN_CFG1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x140)) -#define EMC_DYN_RASCAS1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x144)) -#define EMC_DYN_CFG2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x160)) -#define EMC_DYN_RASCAS2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x164)) -#define EMC_DYN_CFG3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x180)) -#define EMC_DYN_RASCAS3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x184)) - -/* static RAM access registers */ -#define EMC_STA_CFG0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x200)) -#define EMC_STA_WAITWEN0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x204)) -#define EMC_STA_WAITOEN0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x208)) -#define EMC_STA_WAITRD0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x20C)) -#define EMC_STA_WAITPAGE0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x210)) -#define EMC_STA_WAITWR0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x214)) -#define EMC_STA_WAITTURN0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x218)) - -#define EMC_STA_CFG1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x220)) -#define EMC_STA_WAITWEN1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x224)) -#define EMC_STA_WAITOEN1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x228)) -#define EMC_STA_WAITRD1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x22C)) -#define EMC_STA_WAITPAGE1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x230)) -#define EMC_STA_WAITWR1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x234)) -#define EMC_STA_WAITTURN1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x238)) - -#define EMC_STA_CFG2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x240)) -#define EMC_STA_WAITWEN2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x244)) -#define EMC_STA_WAITOEN2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x248)) -#define EMC_STA_WAITRD2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x24C)) -#define EMC_STA_WAITPAGE2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x250)) -#define EMC_STA_WAITWR2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x254)) -#define EMC_STA_WAITTURN2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x258)) - -#define EMC_STA_CFG3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x260)) -#define EMC_STA_WAITWEN3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x264)) -#define EMC_STA_WAITOEN3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x268)) -#define EMC_STA_WAITRD3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x26C)) -#define EMC_STA_WAITPAGE3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x270)) -#define EMC_STA_WAITWR3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x274)) -#define EMC_STA_WAITTURN3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x278)) - -#define EMC_STA_EXT_WAIT (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x880)) - -/* Timer 0 */ -#define TMR0_BASE_ADDR 0xE0004000 -#define T0IR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x00)) -#define T0TCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x04)) -#define T0TC (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x08)) -#define T0PR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x0C)) -#define T0PC (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x10)) -#define T0MCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x14)) -#define T0MR0 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x18)) -#define T0MR1 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x1C)) -#define T0MR2 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x20)) -#define T0MR3 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x24)) -#define T0CCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x28)) -#define T0CR0 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x2C)) -#define T0CR1 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x30)) -#define T0CR2 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x34)) -#define T0CR3 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x38)) -#define T0EMR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x3C)) -#define T0CTCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x70)) - -/* Timer 1 */ -#define TMR1_BASE_ADDR 0xE0008000 -#define T1IR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x00)) -#define T1TCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x04)) -#define T1TC (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x08)) -#define T1PR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x0C)) -#define T1PC (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x10)) -#define T1MCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x14)) -#define T1MR0 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x18)) -#define T1MR1 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x1C)) -#define T1MR2 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x20)) -#define T1MR3 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x24)) -#define T1CCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x28)) -#define T1CR0 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x2C)) -#define T1CR1 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x30)) -#define T1CR2 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x34)) -#define T1CR3 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x38)) -#define T1EMR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x3C)) -#define T1CTCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x70)) - -/* Timer 2 */ -#define TMR2_BASE_ADDR 0xE0070000 -#define T2IR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x00)) -#define T2TCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x04)) -#define T2TC (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x08)) -#define T2PR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x0C)) -#define T2PC (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x10)) -#define T2MCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x14)) -#define T2MR0 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x18)) -#define T2MR1 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x1C)) -#define T2MR2 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x20)) -#define T2MR3 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x24)) -#define T2CCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x28)) -#define T2CR0 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x2C)) -#define T2CR1 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x30)) -#define T2CR2 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x34)) -#define T2CR3 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x38)) -#define T2EMR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x3C)) -#define T2CTCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x70)) - -/* Timer 3 */ -#define TMR3_BASE_ADDR 0xE0074000 -#define T3IR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x00)) -#define T3TCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x04)) -#define T3TC (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x08)) -#define T3PR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x0C)) -#define T3PC (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x10)) -#define T3MCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x14)) -#define T3MR0 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x18)) -#define T3MR1 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x1C)) -#define T3MR2 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x20)) -#define T3MR3 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x24)) -#define T3CCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x28)) -#define T3CR0 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x2C)) -#define T3CR1 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x30)) -#define T3CR2 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x34)) -#define T3CR3 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x38)) -#define T3EMR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x3C)) -#define T3CTCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x70)) - - -/* Pulse Width Modulator (PWM) */ -#define PWM0_BASE_ADDR 0xE0014000 -#define PWM0IR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x00)) -#define PWM0TCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x04)) -#define PWM0TC (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x08)) -#define PWM0PR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x0C)) -#define PWM0PC (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x10)) -#define PWM0MCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x14)) -#define PWM0MR0 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x18)) -#define PWM0MR1 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x1C)) -#define PWM0MR2 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x20)) -#define PWM0MR3 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x24)) -#define PWM0CCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x28)) -#define PWM0CR0 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x2C)) -#define PWM0CR1 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x30)) -#define PWM0CR2 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x34)) -#define PWM0CR3 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x38)) -#define PWM0EMR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x3C)) -#define PWM0MR4 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x40)) -#define PWM0MR5 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x44)) -#define PWM0MR6 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x48)) -#define PWM0PCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x4C)) -#define PWM0LER (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x50)) -#define PWM0CTCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x70)) - -#define PWM1_BASE_ADDR 0xE0018000 -#define PWM1IR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x00)) -#define PWM1TCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x04)) -#define PWM1TC (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x08)) -#define PWM1PR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x0C)) -#define PWM1PC (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x10)) -#define PWM1MCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x14)) -#define PWM1MR0 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x18)) -#define PWM1MR1 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x1C)) -#define PWM1MR2 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x20)) -#define PWM1MR3 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x24)) -#define PWM1CCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x28)) -#define PWM1CR0 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x2C)) -#define PWM1CR1 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x30)) -#define PWM1CR2 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x34)) -#define PWM1CR3 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x38)) -#define PWM1EMR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x3C)) -#define PWM1MR4 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x40)) -#define PWM1MR5 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x44)) -#define PWM1MR6 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x48)) -#define PWM1PCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x4C)) -#define PWM1LER (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x50)) -#define PWM1CTCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x70)) - - -/* Universal Asynchronous Receiver Transmitter 0 (UART0) */ -#define UART0_BASE_ADDR 0xE000C000 -#define U0RBR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00)) -#define U0THR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00)) -#define U0DLL (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00)) -#define U0DLM (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04)) -#define U0IER (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04)) -#define U0IIR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08)) -#define U0FCR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08)) -#define U0LCR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x0C)) -#define U0LSR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x14)) -#define U0SCR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x1C)) -#define U0ACR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x20)) -#define U0ICR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x24)) -#define U0FDR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x28)) -#define U0TER (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x30)) - -/* Universal Asynchronous Receiver Transmitter 1 (UART1) */ -#define UART1_BASE_ADDR 0xE0010000 -#define U1RBR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00)) -#define U1THR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00)) -#define U1DLL (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00)) -#define U1DLM (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04)) -#define U1IER (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04)) -#define U1IIR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08)) -#define U1FCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08)) -#define U1LCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x0C)) -#define U1MCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x10)) -#define U1LSR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x14)) -#define U1MSR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x18)) -#define U1SCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x1C)) -#define U1ACR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x20)) -#define U1FDR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x28)) -#define U1TER (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x30)) - -/* Universal Asynchronous Receiver Transmitter 2 (UART2) */ -#define UART2_BASE_ADDR 0xE0078000 -#define U2RBR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x00)) -#define U2THR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x00)) -#define U2DLL (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x00)) -#define U2DLM (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x04)) -#define U2IER (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x04)) -#define U2IIR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x08)) -#define U2FCR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x08)) -#define U2LCR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x0C)) -#define U2LSR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x14)) -#define U2SCR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x1C)) -#define U2ACR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x20)) -#define U2ICR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x24)) -#define U2FDR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x28)) -#define U2TER (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x30)) - -/* Universal Asynchronous Receiver Transmitter 3 (UART3) */ -#define UART3_BASE_ADDR 0xE007C000 -#define U3RBR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x00)) -#define U3THR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x00)) -#define U3DLL (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x00)) -#define U3DLM (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x04)) -#define U3IER (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x04)) -#define U3IIR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x08)) -#define U3FCR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x08)) -#define U3LCR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x0C)) -#define U3LSR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x14)) -#define U3SCR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x1C)) -#define U3ACR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x20)) -#define U3ICR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x24)) -#define U3FDR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x28)) -#define U3TER (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x30)) - -/* I2C Interface 0 */ -#define I2C0_BASE_ADDR 0xE001C000 -#define I20CONSET (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x00)) -#define I20STAT (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x04)) -#define I20DAT (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x08)) -#define I20ADR (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x0C)) -#define I20SCLH (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x10)) -#define I20SCLL (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x14)) -#define I20CONCLR (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x18)) - -/* I2C Interface 1 */ -#define I2C1_BASE_ADDR 0xE005C000 -#define I21CONSET (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x00)) -#define I21STAT (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x04)) -#define I21DAT (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x08)) -#define I21ADR (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x0C)) -#define I21SCLH (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x10)) -#define I21SCLL (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x14)) -#define I21CONCLR (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x18)) - -/* I2C Interface 2 */ -#define I2C2_BASE_ADDR 0xE0080000 -#define I22CONSET (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x00)) -#define I22STAT (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x04)) -#define I22DAT (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x08)) -#define I22ADR (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x0C)) -#define I22SCLH (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x10)) -#define I22SCLL (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x14)) -#define I22CONCLR (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x18)) - -/* SPI0 (Serial Peripheral Interface 0) */ -#define SPI0_BASE_ADDR 0xE0020000 -#define S0SPCR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x00)) -#define S0SPSR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x04)) -#define S0SPDR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x08)) -#define S0SPCCR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x0C)) -#define S0SPINT (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x1C)) - -/* SSP0 Controller */ -#define SSP0_BASE_ADDR 0xE0068000 -#define SSP0CR0 (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x00)) -#define SSP0CR1 (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x04)) -#define SSP0DR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x08)) -#define SSP0SR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x0C)) -#define SSP0CPSR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x10)) -#define SSP0IMSC (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x14)) -#define SSP0RIS (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x18)) -#define SSP0MIS (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x1C)) -#define SSP0ICR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x20)) -#define SSP0DMACR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x24)) - -/* SSP1 Controller */ -#define SSP1_BASE_ADDR 0xE0030000 -#define SSP1CR0 (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x00)) -#define SSP1CR1 (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x04)) -#define SSP1DR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x08)) -#define SSP1SR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x0C)) -#define SSP1CPSR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x10)) -#define SSP1IMSC (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x14)) -#define SSP1RIS (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x18)) -#define SSP1MIS (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x1C)) -#define SSP1ICR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x20)) -#define SSP1DMACR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x24)) - - -/* Real Time Clock */ -#define RTC_BASE_ADDR 0xE0024000 -#define RTC_ILR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x00)) -#define RTC_CTC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x04)) -#define RTC_CCR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x08)) -#define RTC_CIIR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x0C)) -#define RTC_AMR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x10)) -#define RTC_CTIME0 (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x14)) -#define RTC_CTIME1 (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x18)) -#define RTC_CTIME2 (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x1C)) -#define RTC_SEC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x20)) -#define RTC_MIN (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x24)) -#define RTC_HOUR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x28)) -#define RTC_DOM (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x2C)) -#define RTC_DOW (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x30)) -#define RTC_DOY (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x34)) -#define RTC_MONTH (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x38)) -#define RTC_YEAR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x3C)) -#define RTC_CISS (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x40)) -#define RTC_ALSEC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x60)) -#define RTC_ALMIN (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x64)) -#define RTC_ALHOUR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x68)) -#define RTC_ALDOM (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x6C)) -#define RTC_ALDOW (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x70)) -#define RTC_ALDOY (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x74)) -#define RTC_ALMON (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x78)) -#define RTC_ALYEAR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x7C)) -#define RTC_PREINT (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x80)) -#define RTC_PREFRAC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x84)) - - -/* A/D Converter 0 (AD0) */ -#define AD0_BASE_ADDR 0xE0034000 -#define AD0CR (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x00)) -#define AD0GDR (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x04)) -#define AD0INTEN (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x0C)) -#define AD0DR0 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x10)) -#define AD0DR1 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x14)) -#define AD0DR2 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x18)) -#define AD0DR3 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x1C)) -#define AD0DR4 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x20)) -#define AD0DR5 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x24)) -#define AD0DR6 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x28)) -#define AD0DR7 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x2C)) -#define AD0STAT (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x30)) - - -/* D/A Converter */ -#define DAC_BASE_ADDR 0xE006C000 -#define DACR (*(volatile unsigned long *)(DAC_BASE_ADDR + 0x00)) - - -/* Watchdog */ -#define WDG_BASE_ADDR 0xE0000000 -#define WDMOD (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x00)) -#define WDTC (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x04)) -#define WDFEED (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x08)) -#define WDTV (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x0C)) -#define WDCLKSEL (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x10)) - -/* CAN CONTROLLERS AND ACCEPTANCE FILTER */ -#define CAN_ACCEPT_BASE_ADDR 0xE003C000 -#define CAN_AFMR (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x00)) -#define CAN_SFF_SA (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x04)) -#define CAN_SFF_GRP_SA (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x08)) -#define CAN_EFF_SA (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x0C)) -#define CAN_EFF_GRP_SA (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x10)) -#define CAN_EOT (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x14)) -#define CAN_LUT_ERR_ADR (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x18)) -#define CAN_LUT_ERR (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x1C)) - -#define CAN_CENTRAL_BASE_ADDR 0xE0040000 -#define CAN_TX_SR (*(volatile unsigned long *)(CAN_CENTRAL_BASE_ADDR + 0x00)) -#define CAN_RX_SR (*(volatile unsigned long *)(CAN_CENTRAL_BASE_ADDR + 0x04)) -#define CAN_MSR (*(volatile unsigned long *)(CAN_CENTRAL_BASE_ADDR + 0x08)) - -#define CAN1_BASE_ADDR 0xE0044000 -#define CAN1MOD (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x00)) -#define CAN1CMR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x04)) -#define CAN1GSR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x08)) -#define CAN1ICR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x0C)) -#define CAN1IER (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x10)) -#define CAN1BTR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x14)) -#define CAN1EWL (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x18)) -#define CAN1SR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x1C)) -#define CAN1RFS (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x20)) -#define CAN1RID (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x24)) -#define CAN1RDA (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x28)) -#define CAN1RDB (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x2C)) - -#define CAN1TFI1 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x30)) -#define CAN1TID1 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x34)) -#define CAN1TDA1 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x38)) -#define CAN1TDB1 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x3C)) -#define CAN1TFI2 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x40)) -#define CAN1TID2 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x44)) -#define CAN1TDA2 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x48)) -#define CAN1TDB2 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x4C)) -#define CAN1TFI3 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x50)) -#define CAN1TID3 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x54)) -#define CAN1TDA3 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x58)) -#define CAN1TDB3 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x5C)) - -#define CAN2_BASE_ADDR 0xE0048000 -#define CAN2MOD (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x00)) -#define CAN2CMR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x04)) -#define CAN2GSR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x08)) -#define CAN2ICR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x0C)) -#define CAN2IER (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x10)) -#define CAN2BTR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x14)) -#define CAN2EWL (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x18)) -#define CAN2SR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x1C)) -#define CAN2RFS (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x20)) -#define CAN2RID (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x24)) -#define CAN2RDA (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x28)) -#define CAN2RDB (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x2C)) - -#define CAN2TFI1 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x30)) -#define CAN2TID1 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x34)) -#define CAN2TDA1 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x38)) -#define CAN2TDB1 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x3C)) -#define CAN2TFI2 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x40)) -#define CAN2TID2 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x44)) -#define CAN2TDA2 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x48)) -#define CAN2TDB2 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x4C)) -#define CAN2TFI3 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x50)) -#define CAN2TID3 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x54)) -#define CAN2TDA3 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x58)) -#define CAN2TDB3 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x5C)) - - -/* MultiMedia Card Interface(MCI) Controller */ -#define MCI_BASE_ADDR 0xE008C000 -#define MCI_POWER (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x00)) -#define MCI_CLOCK (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x04)) -#define MCI_ARGUMENT (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x08)) -#define MCI_COMMAND (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x0C)) -#define MCI_RESP_CMD (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x10)) -#define MCI_RESP0 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x14)) -#define MCI_RESP1 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x18)) -#define MCI_RESP2 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x1C)) -#define MCI_RESP3 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x20)) -#define MCI_DATA_TMR (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x24)) -#define MCI_DATA_LEN (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x28)) -#define MCI_DATA_CTRL (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x2C)) -#define MCI_DATA_CNT (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x30)) -#define MCI_STATUS (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x34)) -#define MCI_CLEAR (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x38)) -#define MCI_MASK0 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x3C)) -#define MCI_MASK1 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x40)) -#define MCI_FIFO_CNT (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x48)) -#define MCI_FIFO (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x80)) - - -/* I2S Interface Controller (I2S) */ -#define I2S_BASE_ADDR 0xE0088000 -#define I2S_DAO (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x00)) -#define I2S_DAI (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x04)) -#define I2S_TX_FIFO (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x08)) -#define I2S_RX_FIFO (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x0C)) -#define I2S_STATE (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x10)) -#define I2S_DMA1 (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x14)) -#define I2S_DMA2 (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x18)) -#define I2S_IRQ (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x1C)) -#define I2S_TXRATE (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x20)) -#define I2S_RXRATE (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x24)) - - -/* General-purpose DMA Controller */ -#define DMA_BASE_ADDR 0xFFE04000 -#define GPDMA_INT_STAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x000)) -#define GPDMA_INT_TCSTAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x004)) -#define GPDMA_INT_TCCLR (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x008)) -#define GPDMA_INT_ERR_STAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x00C)) -#define GPDMA_INT_ERR_CLR (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x010)) -#define GPDMA_RAW_INT_TCSTAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x014)) -#define GPDMA_RAW_INT_ERR_STAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x018)) -#define GPDMA_ENABLED_CHNS (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x01C)) -#define GPDMA_SOFT_BREQ (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x020)) -#define GPDMA_SOFT_SREQ (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x024)) -#define GPDMA_SOFT_LBREQ (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x028)) -#define GPDMA_SOFT_LSREQ (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x02C)) -#define GPDMA_CONFIG (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x030)) -#define GPDMA_SYNC (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x034)) - -/* DMA channel 0 registers */ -#define GPDMA_CH0_SRC (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x100)) -#define GPDMA_CH0_DEST (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x104)) -#define GPDMA_CH0_LLI (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x108)) -#define GPDMA_CH0_CTRL (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x10C)) -#define GPDMA_CH0_CFG (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x110)) - -/* DMA channel 1 registers */ -#define GPDMA_CH1_SRC (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x120)) -#define GPDMA_CH1_DEST (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x124)) -#define GPDMA_CH1_LLI (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x128)) -#define GPDMA_CH1_CTRL (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x12C)) -#define GPDMA_CH1_CFG (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x130)) - - -/* USB Controller */ -#define USB_INT_BASE_ADDR 0xE01FC1C0 -#define USB_BASE_ADDR 0xFFE0C200 /* USB Base Address */ - -#define USB_INT_STAT (*(volatile unsigned long *)(USB_INT_BASE_ADDR + 0x00)) - -/* USB Device Interrupt Registers */ -#define DEV_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x00)) -#define DEV_INT_EN (*(volatile unsigned long *)(USB_BASE_ADDR + 0x04)) -#define DEV_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0x08)) -#define DEV_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0x0C)) -#define DEV_INT_PRIO (*(volatile unsigned long *)(USB_BASE_ADDR + 0x2C)) - -/* USB Device Endpoint Interrupt Registers */ -#define EP_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x30)) -#define EP_INT_EN (*(volatile unsigned long *)(USB_BASE_ADDR + 0x34)) -#define EP_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0x38)) -#define EP_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0x3C)) -#define EP_INT_PRIO (*(volatile unsigned long *)(USB_BASE_ADDR + 0x40)) - -/* USB Device Endpoint Realization Registers */ -#define REALIZE_EP (*(volatile unsigned long *)(USB_BASE_ADDR + 0x44)) -#define EP_INDEX (*(volatile unsigned long *)(USB_BASE_ADDR + 0x48)) -#define MAXPACKET_SIZE (*(volatile unsigned long *)(USB_BASE_ADDR + 0x4C)) - -/* USB Device Command Reagisters */ -#define CMD_CODE (*(volatile unsigned long *)(USB_BASE_ADDR + 0x10)) -#define CMD_DATA (*(volatile unsigned long *)(USB_BASE_ADDR + 0x14)) - -/* USB Device Data Transfer Registers */ -#define RX_DATA (*(volatile unsigned long *)(USB_BASE_ADDR + 0x18)) -#define TX_DATA (*(volatile unsigned long *)(USB_BASE_ADDR + 0x1C)) -#define RX_PLENGTH (*(volatile unsigned long *)(USB_BASE_ADDR + 0x20)) -#define TX_PLENGTH (*(volatile unsigned long *)(USB_BASE_ADDR + 0x24)) -#define USB_CTRL (*(volatile unsigned long *)(USB_BASE_ADDR + 0x28)) - -/* USB Device DMA Registers */ -#define DMA_REQ_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x50)) -#define DMA_REQ_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0x54)) -#define DMA_REQ_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0x58)) -#define UDCA_HEAD (*(volatile unsigned long *)(USB_BASE_ADDR + 0x80)) -#define EP_DMA_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x84)) -#define EP_DMA_EN (*(volatile unsigned long *)(USB_BASE_ADDR + 0x88)) -#define EP_DMA_DIS (*(volatile unsigned long *)(USB_BASE_ADDR + 0x8C)) -#define DMA_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x90)) -#define DMA_INT_EN (*(volatile unsigned long *)(USB_BASE_ADDR + 0x94)) -#define EOT_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0xA0)) -#define EOT_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0xA4)) -#define EOT_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0xA8)) -#define NDD_REQ_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0xAC)) -#define NDD_REQ_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0xB0)) -#define NDD_REQ_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0xB4)) -#define SYS_ERR_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0xB8)) -#define SYS_ERR_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0xBC)) -#define SYS_ERR_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0xC0)) - -/* USB Host and OTG registers are for LPC24xx only */ -/* USB Host Controller */ -#define USBHC_BASE_ADDR 0xFFE0C000 -#define HC_REVISION (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x00)) -#define HC_CONTROL (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x04)) -#define HC_CMD_STAT (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x08)) -#define HC_INT_STAT (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x0C)) -#define HC_INT_EN (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x10)) -#define HC_INT_DIS (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x14)) -#define HC_HCCA (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x18)) -#define HC_PERIOD_CUR_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x1C)) -#define HC_CTRL_HEAD_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x20)) -#define HC_CTRL_CUR_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x24)) -#define HC_BULK_HEAD_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x28)) -#define HC_BULK_CUR_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x2C)) -#define HC_DONE_HEAD (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x30)) -#define HC_FM_INTERVAL (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x34)) -#define HC_FM_REMAINING (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x38)) -#define HC_FM_NUMBER (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x3C)) -#define HC_PERIOD_START (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x40)) -#define HC_LS_THRHLD (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x44)) -#define HC_RH_DESCA (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x48)) -#define HC_RH_DESCB (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x4C)) -#define HC_RH_STAT (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x50)) -#define HC_RH_PORT_STAT1 (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x54)) -#define HC_RH_PORT_STAT2 (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x58)) - -/* USB OTG Controller */ -#define USBOTG_BASE_ADDR 0xFFE0C100 -#define OTG_INT_STAT (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x00)) -#define OTG_INT_EN (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x04)) -#define OTG_INT_SET (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x08)) -#define OTG_INT_CLR (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x0C)) -/* On LPC23xx, the name is USBPortSel, on LPC24xx, the name is OTG_STAT_CTRL */ -#define OTG_STAT_CTRL (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x10)) -#define OTG_TIMER (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x14)) - -#define USBOTG_I2C_BASE_ADDR 0xFFE0C300 -#define OTG_I2C_RX (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x00)) -#define OTG_I2C_TX (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x00)) -#define OTG_I2C_STS (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x04)) -#define OTG_I2C_CTL (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x08)) -#define OTG_I2C_CLKHI (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x0C)) -#define OTG_I2C_CLKLO (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x10)) - -/* On LPC23xx, the names are USBClkCtrl and USBClkSt; on LPC24xx, the names are -OTG_CLK_CTRL and OTG_CLK_STAT respectively. */ -#define USBOTG_CLK_BASE_ADDR 0xFFE0CFF0 -#define OTG_CLK_CTRL (*(volatile unsigned long *)(USBOTG_CLK_BASE_ADDR + 0x04)) -#define OTG_CLK_STAT (*(volatile unsigned long *)(USBOTG_CLK_BASE_ADDR + 0x08)) - -/* Note: below three register name convention is for LPC23xx USB device only, match -with the spec. update in USB Device Section. */ -#define USBPortSel (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x10)) -#define USBClkCtrl (*(volatile unsigned long *)(USBOTG_CLK_BASE_ADDR + 0x04)) -#define USBClkSt (*(volatile unsigned long *)(USBOTG_CLK_BASE_ADDR + 0x08)) - -/* Ethernet MAC (32 bit data bus) -- all registers are RW unless indicated in parentheses */ -#define MAC_BASE_ADDR 0xFFE00000 /* AHB Peripheral # 0 */ -#define MAC_MAC1 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x000)) /* MAC config reg 1 */ -#define MAC_MAC2 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x004)) /* MAC config reg 2 */ -#define MAC_IPGT (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x008)) /* b2b InterPacketGap reg */ -#define MAC_IPGR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x00C)) /* non b2b InterPacketGap reg */ -#define MAC_CLRT (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x010)) /* CoLlision window/ReTry reg */ -#define MAC_MAXF (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x014)) /* MAXimum Frame reg */ -#define MAC_SUPP (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x018)) /* PHY SUPPort reg */ -#define MAC_TEST (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x01C)) /* TEST reg */ -#define MAC_MCFG (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x020)) /* MII Mgmt ConFiG reg */ -#define MAC_MCMD (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x024)) /* MII Mgmt CoMmanD reg */ -#define MAC_MADR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x028)) /* MII Mgmt ADdRess reg */ -#define MAC_MWTD (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x02C)) /* MII Mgmt WriTe Data reg (WO) */ -#define MAC_MRDD (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x030)) /* MII Mgmt ReaD Data reg (RO) */ -#define MAC_MIND (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x034)) /* MII Mgmt INDicators reg (RO) */ - -#define MAC_SA0 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x040)) /* Station Address 0 reg */ -#define MAC_SA1 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x044)) /* Station Address 1 reg */ -#define MAC_SA2 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x048)) /* Station Address 2 reg */ - -#define MAC_COMMAND (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x100)) /* Command reg */ -#define MAC_STATUS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x104)) /* Status reg (RO) */ -#define MAC_RXDESCRIPTOR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x108)) /* Rx descriptor base address reg */ -#define MAC_RXSTATUS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x10C)) /* Rx status base address reg */ -#define MAC_RXDESCRIPTORNUM (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x110)) /* Rx number of descriptors reg */ -#define MAC_RXPRODUCEINDEX (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x114)) /* Rx produce index reg (RO) */ -#define MAC_RXCONSUMEINDEX (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x118)) /* Rx consume index reg */ -#define MAC_TXDESCRIPTOR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x11C)) /* Tx descriptor base address reg */ -#define MAC_TXSTATUS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x120)) /* Tx status base address reg */ -#define MAC_TXDESCRIPTORNUM (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x124)) /* Tx number of descriptors reg */ -#define MAC_TXPRODUCEINDEX (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x128)) /* Tx produce index reg */ -#define MAC_TXCONSUMEINDEX (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x12C)) /* Tx consume index reg (RO) */ - -#define MAC_TSV0 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x158)) /* Tx status vector 0 reg (RO) */ -#define MAC_TSV1 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x15C)) /* Tx status vector 1 reg (RO) */ -#define MAC_RSV (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x160)) /* Rx status vector reg (RO) */ - -#define MAC_FLOWCONTROLCNT (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x170)) /* Flow control counter reg */ -#define MAC_FLOWCONTROLSTS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x174)) /* Flow control status reg */ - -#define MAC_RXFILTERCTRL (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x200)) /* Rx filter ctrl reg */ -#define MAC_RXFILTERWOLSTS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x204)) /* Rx filter WoL status reg (RO) */ -#define MAC_RXFILTERWOLCLR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x208)) /* Rx filter WoL clear reg (WO) */ - -#define MAC_HASHFILTERL (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x210)) /* Hash filter LSBs reg */ -#define MAC_HASHFILTERH (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x214)) /* Hash filter MSBs reg */ - -#define MAC_INTSTATUS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFE0)) /* Interrupt status reg (RO) */ -#define MAC_INTENABLE (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFE4)) /* Interrupt enable reg */ -#define MAC_INTCLEAR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFE8)) /* Interrupt clear reg (WO) */ -#define MAC_INTSET (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFEC)) /* Interrupt set reg (WO) */ - -#define MAC_POWERDOWN (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFF4)) /* Power-down reg */ -#define MAC_MODULEID (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFFC)) /* Module ID reg (RO) */ - - -#endif // __LPC23xx_H - +/****************************************************************************** + * LPC23xx.h: Header file for NXP LPC23xx/24xx Family Microprocessors + * The header file is the super set of all hardware definition of the + * peripherals for the LPC23xx/24xx family microprocessor. + * + * Copyright(C) 2006, NXP Semiconductor + * All rights reserved. + * + * History + * 2005.10.01 ver 1.00 Prelimnary version, first Release + * 2007.05.17 ver 1.01 several corrections + * +******************************************************************************/ + +#ifndef __LPC23xx_H +#define __LPC23xx_H + +/* Vectored Interrupt Controller (VIC) */ +#define VIC_BASE_ADDR 0xFFFFF000 +#define VICIRQStatus (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x000)) +#define VICFIQStatus (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x004)) +#define VICRawIntr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x008)) +#define VICIntSelect (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x00C)) +#define VICIntEnable (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x010)) +#define VICIntEnClr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x014)) +#define VICSoftInt (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x018)) +#define VICSoftIntClr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x01C)) +#define VICProtection (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x020)) +#define VICSWPrioMask (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x024)) + +#define VICVectAddr0 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x100)) +#define VICVectAddr1 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x104)) +#define VICVectAddr2 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x108)) +#define VICVectAddr3 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x10C)) +#define VICVectAddr4 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x110)) +#define VICVectAddr5 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x114)) +#define VICVectAddr6 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x118)) +#define VICVectAddr7 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x11C)) +#define VICVectAddr8 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x120)) +#define VICVectAddr9 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x124)) +#define VICVectAddr10 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x128)) +#define VICVectAddr11 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x12C)) +#define VICVectAddr12 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x130)) +#define VICVectAddr13 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x134)) +#define VICVectAddr14 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x138)) +#define VICVectAddr15 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x13C)) +#define VICVectAddr16 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x140)) +#define VICVectAddr17 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x144)) +#define VICVectAddr18 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x148)) +#define VICVectAddr19 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x14C)) +#define VICVectAddr20 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x150)) +#define VICVectAddr21 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x154)) +#define VICVectAddr22 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x158)) +#define VICVectAddr23 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x15C)) +#define VICVectAddr24 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x160)) +#define VICVectAddr25 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x164)) +#define VICVectAddr26 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x168)) +#define VICVectAddr27 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x16C)) +#define VICVectAddr28 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x170)) +#define VICVectAddr29 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x174)) +#define VICVectAddr30 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x178)) +#define VICVectAddr31 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x17C)) + +/* The name convention below is from previous LPC2000 family MCUs, in LPC23xx/24xx, +these registers are known as "VICVectPriority(x)". */ +#define VICVectCntl0 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x200)) +#define VICVectCntl1 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x204)) +#define VICVectCntl2 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x208)) +#define VICVectCntl3 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x20C)) +#define VICVectCntl4 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x210)) +#define VICVectCntl5 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x214)) +#define VICVectCntl6 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x218)) +#define VICVectCntl7 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x21C)) +#define VICVectCntl8 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x220)) +#define VICVectCntl9 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x224)) +#define VICVectCntl10 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x228)) +#define VICVectCntl11 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x22C)) +#define VICVectCntl12 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x230)) +#define VICVectCntl13 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x234)) +#define VICVectCntl14 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x238)) +#define VICVectCntl15 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x23C)) +#define VICVectCntl16 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x240)) +#define VICVectCntl17 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x244)) +#define VICVectCntl18 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x248)) +#define VICVectCntl19 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x24C)) +#define VICVectCntl20 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x250)) +#define VICVectCntl21 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x254)) +#define VICVectCntl22 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x258)) +#define VICVectCntl23 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x25C)) +#define VICVectCntl24 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x260)) +#define VICVectCntl25 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x264)) +#define VICVectCntl26 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x268)) +#define VICVectCntl27 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x26C)) +#define VICVectCntl28 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x270)) +#define VICVectCntl29 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x274)) +#define VICVectCntl30 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x278)) +#define VICVectCntl31 (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x27C)) + +#define VICVectAddr (*(volatile unsigned long *)(VIC_BASE_ADDR + 0xF00)) + + +/* Pin Connect Block */ +#define PINSEL_BASE_ADDR 0xE002C000 +#define PINSEL0 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x00)) +#define PINSEL1 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x04)) +#define PINSEL2 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x08)) +#define PINSEL3 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x0C)) +#define PINSEL4 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x10)) +#define PINSEL5 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x14)) +#define PINSEL6 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x18)) +#define PINSEL7 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x1C)) +#define PINSEL8 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x20)) +#define PINSEL9 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x24)) +#define PINSEL10 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x28)) + +#define PINMODE0 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x40)) +#define PINMODE1 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x44)) +#define PINMODE2 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x48)) +#define PINMODE3 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x4C)) +#define PINMODE4 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x50)) +#define PINMODE5 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x54)) +#define PINMODE6 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x58)) +#define PINMODE7 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x5C)) +#define PINMODE8 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x60)) +#define PINMODE9 (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x64)) + +/* General Purpose Input/Output (GPIO) */ +#define GPIO_BASE_ADDR 0xE0028000 +#define IOPIN0 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x00)) +#define IOSET0 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x04)) +#define IODIR0 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x08)) +#define IOCLR0 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x0C)) +#define IOPIN1 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x10)) +#define IOSET1 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x14)) +#define IODIR1 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x18)) +#define IOCLR1 (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x1C)) + +/* GPIO Interrupt Registers */ +#define IO0_INT_EN_R (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x90)) +#define IO0_INT_EN_F (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x94)) +#define IO0_INT_STAT_R (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x84)) +#define IO0_INT_STAT_F (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x88)) +#define IO0_INT_CLR (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x8C)) + +#define IO2_INT_EN_R (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xB0)) +#define IO2_INT_EN_F (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xB4)) +#define IO2_INT_STAT_R (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xA4)) +#define IO2_INT_STAT_F (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xA8)) +#define IO2_INT_CLR (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xAC)) + +#define IO_INT_STAT (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x80)) + +#define PARTCFG_BASE_ADDR 0x3FFF8000 +#define PARTCFG (*(volatile unsigned long *)(PARTCFG_BASE_ADDR + 0x00)) + +/* Fast I/O setup */ +#define FIO_BASE_ADDR 0x3FFFC000 +#define FIO0DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x00)) +#define FIO0MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x10)) +#define FIO0PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x14)) +#define FIO0SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x18)) +#define FIO0CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x1C)) + +#define FIO1DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x20)) +#define FIO1MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x30)) +#define FIO1PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x34)) +#define FIO1SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x38)) +#define FIO1CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x3C)) + +#define FIO2DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x40)) +#define FIO2MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x50)) +#define FIO2PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x54)) +#define FIO2SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x58)) +#define FIO2CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x5C)) + +#define FIO3DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x60)) +#define FIO3MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x70)) +#define FIO3PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x74)) +#define FIO3SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x78)) +#define FIO3CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x7C)) + +#define FIO4DIR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x80)) +#define FIO4MASK (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x90)) +#define FIO4PIN (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x94)) +#define FIO4SET (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x98)) +#define FIO4CLR (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x9C)) + +/* FIOs can be accessed through WORD, HALF-WORD or BYTE. */ +#define FIO0DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x00)) +#define FIO1DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x20)) +#define FIO2DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x40)) +#define FIO3DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x60)) +#define FIO4DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x80)) + +#define FIO0DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x01)) +#define FIO1DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x21)) +#define FIO2DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x41)) +#define FIO3DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x61)) +#define FIO4DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x81)) + +#define FIO0DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x02)) +#define FIO1DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x22)) +#define FIO2DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x42)) +#define FIO3DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x62)) +#define FIO4DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x82)) + +#define FIO0DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x03)) +#define FIO1DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x23)) +#define FIO2DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x43)) +#define FIO3DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x63)) +#define FIO4DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x83)) + +#define FIO0DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x00)) +#define FIO1DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x20)) +#define FIO2DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x40)) +#define FIO3DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x60)) +#define FIO4DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x80)) + +#define FIO0DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x02)) +#define FIO1DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x22)) +#define FIO2DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x42)) +#define FIO3DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x62)) +#define FIO4DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x82)) + +#define FIO0MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x10)) +#define FIO1MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x30)) +#define FIO2MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x50)) +#define FIO3MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x70)) +#define FIO4MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x90)) + +#define FIO0MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x11)) +#define FIO1MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x21)) +#define FIO2MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x51)) +#define FIO3MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x71)) +#define FIO4MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x91)) + +#define FIO0MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x12)) +#define FIO1MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x32)) +#define FIO2MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x52)) +#define FIO3MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x72)) +#define FIO4MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x92)) + +#define FIO0MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x13)) +#define FIO1MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x33)) +#define FIO2MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x53)) +#define FIO3MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x73)) +#define FIO4MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x93)) + +#define FIO0MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x10)) +#define FIO1MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x30)) +#define FIO2MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x50)) +#define FIO3MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x70)) +#define FIO4MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x90)) + +#define FIO0MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x12)) +#define FIO1MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x32)) +#define FIO2MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x52)) +#define FIO3MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x72)) +#define FIO4MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x92)) + +#define FIO0PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x14)) +#define FIO1PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x34)) +#define FIO2PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x54)) +#define FIO3PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x74)) +#define FIO4PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x94)) + +#define FIO0PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x15)) +#define FIO1PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x25)) +#define FIO2PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x55)) +#define FIO3PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x75)) +#define FIO4PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x95)) + +#define FIO0PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x16)) +#define FIO1PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x36)) +#define FIO2PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x56)) +#define FIO3PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x76)) +#define FIO4PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x96)) + +#define FIO0PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x17)) +#define FIO1PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x37)) +#define FIO2PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x57)) +#define FIO3PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x77)) +#define FIO4PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x97)) + +#define FIO0PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x14)) +#define FIO1PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x34)) +#define FIO2PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x54)) +#define FIO3PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x74)) +#define FIO4PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x94)) + +#define FIO0PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x16)) +#define FIO1PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x36)) +#define FIO2PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x56)) +#define FIO3PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x76)) +#define FIO4PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x96)) + +#define FIO0SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x18)) +#define FIO1SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x38)) +#define FIO2SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x58)) +#define FIO3SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x78)) +#define FIO4SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x98)) + +#define FIO0SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x19)) +#define FIO1SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x29)) +#define FIO2SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x59)) +#define FIO3SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x79)) +#define FIO4SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x99)) + +#define FIO0SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1A)) +#define FIO1SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3A)) +#define FIO2SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5A)) +#define FIO3SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7A)) +#define FIO4SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9A)) + +#define FIO0SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1B)) +#define FIO1SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3B)) +#define FIO2SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5B)) +#define FIO3SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7B)) +#define FIO4SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9B)) + +#define FIO0SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x18)) +#define FIO1SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x38)) +#define FIO2SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x58)) +#define FIO3SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x78)) +#define FIO4SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x98)) + +#define FIO0SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1A)) +#define FIO1SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3A)) +#define FIO2SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5A)) +#define FIO3SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7A)) +#define FIO4SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9A)) + +#define FIO0CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1C)) +#define FIO1CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3C)) +#define FIO2CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5C)) +#define FIO3CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7C)) +#define FIO4CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9C)) + +#define FIO0CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1D)) +#define FIO1CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x2D)) +#define FIO2CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5D)) +#define FIO3CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7D)) +#define FIO4CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9D)) + +#define FIO0CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1E)) +#define FIO1CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3E)) +#define FIO2CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5E)) +#define FIO3CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7E)) +#define FIO4CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9E)) + +#define FIO0CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1F)) +#define FIO1CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3F)) +#define FIO2CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5F)) +#define FIO3CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7F)) +#define FIO4CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9F)) + +#define FIO0CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1C)) +#define FIO1CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3C)) +#define FIO2CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5C)) +#define FIO3CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7C)) +#define FIO4CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9C)) + +#define FIO0CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1E)) +#define FIO1CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3E)) +#define FIO2CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5E)) +#define FIO3CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7E)) +#define FIO4CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9E)) + + +/* System Control Block(SCB) modules include Memory Accelerator Module, +Phase Locked Loop, VPB divider, Power Control, External Interrupt, +Reset, and Code Security/Debugging */ +#define SCB_BASE_ADDR 0xE01FC000 + +/* Memory Accelerator Module (MAM) */ +#define MAMCR (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x000)) +#define MAMTIM (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x004)) +#define MEMMAP (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x040)) + +/* Phase Locked Loop (PLL) */ +#define PLLCON (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x080)) +#define PLLCFG (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x084)) +#define PLLSTAT (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x088)) +#define PLLFEED (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x08C)) + +/* Power Control */ +#define PCON (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C0)) +#define PCONP (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C4)) + +/* Clock Divider */ +// #define APBDIV (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x100)) +#define CCLKCFG (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x104)) +#define USBCLKCFG (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x108)) +#define CLKSRCSEL (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x10C)) +#define PCLKSEL0 (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1A8)) +#define PCLKSEL1 (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1AC)) + +/* External Interrupts */ +#define EXTINT (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x140)) +#define INTWAKE (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x144)) +#define EXTMODE (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x148)) +#define EXTPOLAR (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x14C)) + +/* Reset, reset source identification */ +#define RSIR (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x180)) + +/* RSID, code security protection */ +#define CSPR (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x184)) + +/* AHB configuration */ +#define AHBCFG1 (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x188)) +#define AHBCFG2 (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x18C)) + +/* System Controls and Status */ +#define SCS (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1A0)) + +/* MPMC(EMC) registers, note: all the external memory controller(EMC) registers +are for LPC24xx only. */ +#define STATIC_MEM0_BASE 0x80000000 +#define STATIC_MEM1_BASE 0x81000000 +#define STATIC_MEM2_BASE 0x82000000 +#define STATIC_MEM3_BASE 0x83000000 + +#define DYNAMIC_MEM0_BASE 0xA0000000 +#define DYNAMIC_MEM1_BASE 0xB0000000 +#define DYNAMIC_MEM2_BASE 0xC0000000 +#define DYNAMIC_MEM3_BASE 0xD0000000 + +/* External Memory Controller (EMC) */ +#define EMC_BASE_ADDR 0xFFE08000 +#define EMC_CTRL (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x000)) +#define EMC_STAT (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x004)) +#define EMC_CONFIG (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x008)) + +/* Dynamic RAM access registers */ +#define EMC_DYN_CTRL (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x020)) +#define EMC_DYN_RFSH (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x024)) +#define EMC_DYN_RD_CFG (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x028)) +#define EMC_DYN_RP (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x030)) +#define EMC_DYN_RAS (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x034)) +#define EMC_DYN_SREX (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x038)) +#define EMC_DYN_APR (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x03C)) +#define EMC_DYN_DAL (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x040)) +#define EMC_DYN_WR (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x044)) +#define EMC_DYN_RC (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x048)) +#define EMC_DYN_RFC (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x04C)) +#define EMC_DYN_XSR (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x050)) +#define EMC_DYN_RRD (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x054)) +#define EMC_DYN_MRD (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x058)) + +#define EMC_DYN_CFG0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x100)) +#define EMC_DYN_RASCAS0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x104)) +#define EMC_DYN_CFG1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x140)) +#define EMC_DYN_RASCAS1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x144)) +#define EMC_DYN_CFG2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x160)) +#define EMC_DYN_RASCAS2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x164)) +#define EMC_DYN_CFG3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x180)) +#define EMC_DYN_RASCAS3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x184)) + +/* static RAM access registers */ +#define EMC_STA_CFG0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x200)) +#define EMC_STA_WAITWEN0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x204)) +#define EMC_STA_WAITOEN0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x208)) +#define EMC_STA_WAITRD0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x20C)) +#define EMC_STA_WAITPAGE0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x210)) +#define EMC_STA_WAITWR0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x214)) +#define EMC_STA_WAITTURN0 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x218)) + +#define EMC_STA_CFG1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x220)) +#define EMC_STA_WAITWEN1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x224)) +#define EMC_STA_WAITOEN1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x228)) +#define EMC_STA_WAITRD1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x22C)) +#define EMC_STA_WAITPAGE1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x230)) +#define EMC_STA_WAITWR1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x234)) +#define EMC_STA_WAITTURN1 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x238)) + +#define EMC_STA_CFG2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x240)) +#define EMC_STA_WAITWEN2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x244)) +#define EMC_STA_WAITOEN2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x248)) +#define EMC_STA_WAITRD2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x24C)) +#define EMC_STA_WAITPAGE2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x250)) +#define EMC_STA_WAITWR2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x254)) +#define EMC_STA_WAITTURN2 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x258)) + +#define EMC_STA_CFG3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x260)) +#define EMC_STA_WAITWEN3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x264)) +#define EMC_STA_WAITOEN3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x268)) +#define EMC_STA_WAITRD3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x26C)) +#define EMC_STA_WAITPAGE3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x270)) +#define EMC_STA_WAITWR3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x274)) +#define EMC_STA_WAITTURN3 (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x278)) + +#define EMC_STA_EXT_WAIT (*(volatile unsigned long *)(EMC_BASE_ADDR + 0x880)) + +/* Timer 0 */ +#define TMR0_BASE_ADDR 0xE0004000 +#define T0IR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x00)) +#define T0TCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x04)) +#define T0TC (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x08)) +#define T0PR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x0C)) +#define T0PC (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x10)) +#define T0MCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x14)) +#define T0MR0 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x18)) +#define T0MR1 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x1C)) +#define T0MR2 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x20)) +#define T0MR3 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x24)) +#define T0CCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x28)) +#define T0CR0 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x2C)) +#define T0CR1 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x30)) +#define T0CR2 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x34)) +#define T0CR3 (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x38)) +#define T0EMR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x3C)) +#define T0CTCR (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x70)) + +/* Timer 1 */ +#define TMR1_BASE_ADDR 0xE0008000 +#define T1IR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x00)) +#define T1TCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x04)) +#define T1TC (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x08)) +#define T1PR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x0C)) +#define T1PC (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x10)) +#define T1MCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x14)) +#define T1MR0 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x18)) +#define T1MR1 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x1C)) +#define T1MR2 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x20)) +#define T1MR3 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x24)) +#define T1CCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x28)) +#define T1CR0 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x2C)) +#define T1CR1 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x30)) +#define T1CR2 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x34)) +#define T1CR3 (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x38)) +#define T1EMR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x3C)) +#define T1CTCR (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x70)) + +/* Timer 2 */ +#define TMR2_BASE_ADDR 0xE0070000 +#define T2IR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x00)) +#define T2TCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x04)) +#define T2TC (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x08)) +#define T2PR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x0C)) +#define T2PC (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x10)) +#define T2MCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x14)) +#define T2MR0 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x18)) +#define T2MR1 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x1C)) +#define T2MR2 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x20)) +#define T2MR3 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x24)) +#define T2CCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x28)) +#define T2CR0 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x2C)) +#define T2CR1 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x30)) +#define T2CR2 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x34)) +#define T2CR3 (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x38)) +#define T2EMR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x3C)) +#define T2CTCR (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x70)) + +/* Timer 3 */ +#define TMR3_BASE_ADDR 0xE0074000 +#define T3IR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x00)) +#define T3TCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x04)) +#define T3TC (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x08)) +#define T3PR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x0C)) +#define T3PC (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x10)) +#define T3MCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x14)) +#define T3MR0 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x18)) +#define T3MR1 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x1C)) +#define T3MR2 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x20)) +#define T3MR3 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x24)) +#define T3CCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x28)) +#define T3CR0 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x2C)) +#define T3CR1 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x30)) +#define T3CR2 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x34)) +#define T3CR3 (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x38)) +#define T3EMR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x3C)) +#define T3CTCR (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x70)) + + +/* Pulse Width Modulator (PWM) */ +#define PWM0_BASE_ADDR 0xE0014000 +#define PWM0IR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x00)) +#define PWM0TCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x04)) +#define PWM0TC (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x08)) +#define PWM0PR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x0C)) +#define PWM0PC (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x10)) +#define PWM0MCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x14)) +#define PWM0MR0 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x18)) +#define PWM0MR1 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x1C)) +#define PWM0MR2 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x20)) +#define PWM0MR3 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x24)) +#define PWM0CCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x28)) +#define PWM0CR0 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x2C)) +#define PWM0CR1 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x30)) +#define PWM0CR2 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x34)) +#define PWM0CR3 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x38)) +#define PWM0EMR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x3C)) +#define PWM0MR4 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x40)) +#define PWM0MR5 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x44)) +#define PWM0MR6 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x48)) +#define PWM0PCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x4C)) +#define PWM0LER (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x50)) +#define PWM0CTCR (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x70)) + +#define PWM1_BASE_ADDR 0xE0018000 +#define PWM1IR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x00)) +#define PWM1TCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x04)) +#define PWM1TC (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x08)) +#define PWM1PR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x0C)) +#define PWM1PC (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x10)) +#define PWM1MCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x14)) +#define PWM1MR0 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x18)) +#define PWM1MR1 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x1C)) +#define PWM1MR2 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x20)) +#define PWM1MR3 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x24)) +#define PWM1CCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x28)) +#define PWM1CR0 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x2C)) +#define PWM1CR1 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x30)) +#define PWM1CR2 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x34)) +#define PWM1CR3 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x38)) +#define PWM1EMR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x3C)) +#define PWM1MR4 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x40)) +#define PWM1MR5 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x44)) +#define PWM1MR6 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x48)) +#define PWM1PCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x4C)) +#define PWM1LER (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x50)) +#define PWM1CTCR (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x70)) + + +/* Universal Asynchronous Receiver Transmitter 0 (UART0) */ +#define UART0_BASE_ADDR 0xE000C000 +#define U0RBR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00)) +#define U0THR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00)) +#define U0DLL (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00)) +#define U0DLM (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04)) +#define U0IER (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04)) +#define U0IIR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08)) +#define U0FCR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08)) +#define U0LCR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x0C)) +#define U0LSR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x14)) +#define U0SCR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x1C)) +#define U0ACR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x20)) +#define U0ICR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x24)) +#define U0FDR (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x28)) +#define U0TER (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x30)) + +/* Universal Asynchronous Receiver Transmitter 1 (UART1) */ +#define UART1_BASE_ADDR 0xE0010000 +#define U1RBR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00)) +#define U1THR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00)) +#define U1DLL (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00)) +#define U1DLM (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04)) +#define U1IER (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04)) +#define U1IIR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08)) +#define U1FCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08)) +#define U1LCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x0C)) +#define U1MCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x10)) +#define U1LSR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x14)) +#define U1MSR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x18)) +#define U1SCR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x1C)) +#define U1ACR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x20)) +#define U1FDR (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x28)) +#define U1TER (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x30)) + +/* Universal Asynchronous Receiver Transmitter 2 (UART2) */ +#define UART2_BASE_ADDR 0xE0078000 +#define U2RBR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x00)) +#define U2THR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x00)) +#define U2DLL (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x00)) +#define U2DLM (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x04)) +#define U2IER (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x04)) +#define U2IIR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x08)) +#define U2FCR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x08)) +#define U2LCR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x0C)) +#define U2LSR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x14)) +#define U2SCR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x1C)) +#define U2ACR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x20)) +#define U2ICR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x24)) +#define U2FDR (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x28)) +#define U2TER (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x30)) + +/* Universal Asynchronous Receiver Transmitter 3 (UART3) */ +#define UART3_BASE_ADDR 0xE007C000 +#define U3RBR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x00)) +#define U3THR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x00)) +#define U3DLL (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x00)) +#define U3DLM (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x04)) +#define U3IER (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x04)) +#define U3IIR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x08)) +#define U3FCR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x08)) +#define U3LCR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x0C)) +#define U3LSR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x14)) +#define U3SCR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x1C)) +#define U3ACR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x20)) +#define U3ICR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x24)) +#define U3FDR (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x28)) +#define U3TER (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x30)) + +/* I2C Interface 0 */ +#define I2C0_BASE_ADDR 0xE001C000 +#define I20CONSET (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x00)) +#define I20STAT (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x04)) +#define I20DAT (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x08)) +#define I20ADR (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x0C)) +#define I20SCLH (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x10)) +#define I20SCLL (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x14)) +#define I20CONCLR (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x18)) + +/* I2C Interface 1 */ +#define I2C1_BASE_ADDR 0xE005C000 +#define I21CONSET (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x00)) +#define I21STAT (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x04)) +#define I21DAT (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x08)) +#define I21ADR (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x0C)) +#define I21SCLH (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x10)) +#define I21SCLL (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x14)) +#define I21CONCLR (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x18)) + +/* I2C Interface 2 */ +#define I2C2_BASE_ADDR 0xE0080000 +#define I22CONSET (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x00)) +#define I22STAT (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x04)) +#define I22DAT (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x08)) +#define I22ADR (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x0C)) +#define I22SCLH (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x10)) +#define I22SCLL (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x14)) +#define I22CONCLR (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x18)) + +/* SPI0 (Serial Peripheral Interface 0) */ +#define SPI0_BASE_ADDR 0xE0020000 +#define S0SPCR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x00)) +#define S0SPSR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x04)) +#define S0SPDR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x08)) +#define S0SPCCR (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x0C)) +#define S0SPINT (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x1C)) + +/* SSP0 Controller */ +#define SSP0_BASE_ADDR 0xE0068000 +#define SSP0CR0 (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x00)) +#define SSP0CR1 (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x04)) +#define SSP0DR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x08)) +#define SSP0SR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x0C)) +#define SSP0CPSR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x10)) +#define SSP0IMSC (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x14)) +#define SSP0RIS (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x18)) +#define SSP0MIS (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x1C)) +#define SSP0ICR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x20)) +#define SSP0DMACR (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x24)) + +/* SSP1 Controller */ +#define SSP1_BASE_ADDR 0xE0030000 +#define SSP1CR0 (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x00)) +#define SSP1CR1 (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x04)) +#define SSP1DR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x08)) +#define SSP1SR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x0C)) +#define SSP1CPSR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x10)) +#define SSP1IMSC (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x14)) +#define SSP1RIS (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x18)) +#define SSP1MIS (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x1C)) +#define SSP1ICR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x20)) +#define SSP1DMACR (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x24)) + + +/* Real Time Clock */ +#define RTC_BASE_ADDR 0xE0024000 +#define RTC_ILR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x00)) +#define RTC_CTC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x04)) +#define RTC_CCR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x08)) +#define RTC_CIIR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x0C)) +#define RTC_AMR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x10)) +#define RTC_CTIME0 (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x14)) +#define RTC_CTIME1 (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x18)) +#define RTC_CTIME2 (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x1C)) +#define RTC_SEC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x20)) +#define RTC_MIN (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x24)) +#define RTC_HOUR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x28)) +#define RTC_DOM (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x2C)) +#define RTC_DOW (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x30)) +#define RTC_DOY (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x34)) +#define RTC_MONTH (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x38)) +#define RTC_YEAR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x3C)) +#define RTC_CISS (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x40)) +#define RTC_ALSEC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x60)) +#define RTC_ALMIN (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x64)) +#define RTC_ALHOUR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x68)) +#define RTC_ALDOM (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x6C)) +#define RTC_ALDOW (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x70)) +#define RTC_ALDOY (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x74)) +#define RTC_ALMON (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x78)) +#define RTC_ALYEAR (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x7C)) +#define RTC_PREINT (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x80)) +#define RTC_PREFRAC (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x84)) + + +/* A/D Converter 0 (AD0) */ +#define AD0_BASE_ADDR 0xE0034000 +#define AD0CR (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x00)) +#define AD0GDR (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x04)) +#define AD0INTEN (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x0C)) +#define AD0DR0 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x10)) +#define AD0DR1 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x14)) +#define AD0DR2 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x18)) +#define AD0DR3 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x1C)) +#define AD0DR4 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x20)) +#define AD0DR5 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x24)) +#define AD0DR6 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x28)) +#define AD0DR7 (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x2C)) +#define AD0STAT (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x30)) + + +/* D/A Converter */ +#define DAC_BASE_ADDR 0xE006C000 +#define DACR (*(volatile unsigned long *)(DAC_BASE_ADDR + 0x00)) + + +/* Watchdog */ +#define WDG_BASE_ADDR 0xE0000000 +#define WDMOD (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x00)) +#define WDTC (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x04)) +#define WDFEED (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x08)) +#define WDTV (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x0C)) +#define WDCLKSEL (*(volatile unsigned long *)(WDG_BASE_ADDR + 0x10)) + +/* CAN CONTROLLERS AND ACCEPTANCE FILTER */ +#define CAN_ACCEPT_BASE_ADDR 0xE003C000 +#define CAN_AFMR (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x00)) +#define CAN_SFF_SA (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x04)) +#define CAN_SFF_GRP_SA (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x08)) +#define CAN_EFF_SA (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x0C)) +#define CAN_EFF_GRP_SA (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x10)) +#define CAN_EOT (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x14)) +#define CAN_LUT_ERR_ADR (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x18)) +#define CAN_LUT_ERR (*(volatile unsigned long *)(CAN_ACCEPT_BASE_ADDR + 0x1C)) + +#define CAN_CENTRAL_BASE_ADDR 0xE0040000 +#define CAN_TX_SR (*(volatile unsigned long *)(CAN_CENTRAL_BASE_ADDR + 0x00)) +#define CAN_RX_SR (*(volatile unsigned long *)(CAN_CENTRAL_BASE_ADDR + 0x04)) +#define CAN_MSR (*(volatile unsigned long *)(CAN_CENTRAL_BASE_ADDR + 0x08)) + +#define CAN1_BASE_ADDR 0xE0044000 +#define CAN1MOD (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x00)) +#define CAN1CMR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x04)) +#define CAN1GSR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x08)) +#define CAN1ICR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x0C)) +#define CAN1IER (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x10)) +#define CAN1BTR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x14)) +#define CAN1EWL (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x18)) +#define CAN1SR (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x1C)) +#define CAN1RFS (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x20)) +#define CAN1RID (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x24)) +#define CAN1RDA (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x28)) +#define CAN1RDB (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x2C)) + +#define CAN1TFI1 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x30)) +#define CAN1TID1 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x34)) +#define CAN1TDA1 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x38)) +#define CAN1TDB1 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x3C)) +#define CAN1TFI2 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x40)) +#define CAN1TID2 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x44)) +#define CAN1TDA2 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x48)) +#define CAN1TDB2 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x4C)) +#define CAN1TFI3 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x50)) +#define CAN1TID3 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x54)) +#define CAN1TDA3 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x58)) +#define CAN1TDB3 (*(volatile unsigned long *)(CAN1_BASE_ADDR + 0x5C)) + +#define CAN2_BASE_ADDR 0xE0048000 +#define CAN2MOD (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x00)) +#define CAN2CMR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x04)) +#define CAN2GSR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x08)) +#define CAN2ICR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x0C)) +#define CAN2IER (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x10)) +#define CAN2BTR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x14)) +#define CAN2EWL (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x18)) +#define CAN2SR (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x1C)) +#define CAN2RFS (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x20)) +#define CAN2RID (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x24)) +#define CAN2RDA (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x28)) +#define CAN2RDB (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x2C)) + +#define CAN2TFI1 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x30)) +#define CAN2TID1 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x34)) +#define CAN2TDA1 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x38)) +#define CAN2TDB1 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x3C)) +#define CAN2TFI2 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x40)) +#define CAN2TID2 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x44)) +#define CAN2TDA2 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x48)) +#define CAN2TDB2 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x4C)) +#define CAN2TFI3 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x50)) +#define CAN2TID3 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x54)) +#define CAN2TDA3 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x58)) +#define CAN2TDB3 (*(volatile unsigned long *)(CAN2_BASE_ADDR + 0x5C)) + + +/* MultiMedia Card Interface(MCI) Controller */ +#define MCI_BASE_ADDR 0xE008C000 +#define MCI_POWER (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x00)) +#define MCI_CLOCK (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x04)) +#define MCI_ARGUMENT (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x08)) +#define MCI_COMMAND (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x0C)) +#define MCI_RESP_CMD (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x10)) +#define MCI_RESP0 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x14)) +#define MCI_RESP1 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x18)) +#define MCI_RESP2 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x1C)) +#define MCI_RESP3 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x20)) +#define MCI_DATA_TMR (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x24)) +#define MCI_DATA_LEN (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x28)) +#define MCI_DATA_CTRL (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x2C)) +#define MCI_DATA_CNT (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x30)) +#define MCI_STATUS (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x34)) +#define MCI_CLEAR (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x38)) +#define MCI_MASK0 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x3C)) +#define MCI_MASK1 (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x40)) +#define MCI_FIFO_CNT (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x48)) +#define MCI_FIFO (*(volatile unsigned long *)(MCI_BASE_ADDR + 0x80)) + + +/* I2S Interface Controller (I2S) */ +#define I2S_BASE_ADDR 0xE0088000 +#define I2S_DAO (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x00)) +#define I2S_DAI (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x04)) +#define I2S_TX_FIFO (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x08)) +#define I2S_RX_FIFO (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x0C)) +#define I2S_STATE (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x10)) +#define I2S_DMA1 (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x14)) +#define I2S_DMA2 (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x18)) +#define I2S_IRQ (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x1C)) +#define I2S_TXRATE (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x20)) +#define I2S_RXRATE (*(volatile unsigned long *)(I2S_BASE_ADDR + 0x24)) + + +/* General-purpose DMA Controller */ +#define DMA_BASE_ADDR 0xFFE04000 +#define GPDMA_INT_STAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x000)) +#define GPDMA_INT_TCSTAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x004)) +#define GPDMA_INT_TCCLR (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x008)) +#define GPDMA_INT_ERR_STAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x00C)) +#define GPDMA_INT_ERR_CLR (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x010)) +#define GPDMA_RAW_INT_TCSTAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x014)) +#define GPDMA_RAW_INT_ERR_STAT (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x018)) +#define GPDMA_ENABLED_CHNS (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x01C)) +#define GPDMA_SOFT_BREQ (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x020)) +#define GPDMA_SOFT_SREQ (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x024)) +#define GPDMA_SOFT_LBREQ (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x028)) +#define GPDMA_SOFT_LSREQ (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x02C)) +#define GPDMA_CONFIG (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x030)) +#define GPDMA_SYNC (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x034)) + +/* DMA channel 0 registers */ +#define GPDMA_CH0_SRC (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x100)) +#define GPDMA_CH0_DEST (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x104)) +#define GPDMA_CH0_LLI (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x108)) +#define GPDMA_CH0_CTRL (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x10C)) +#define GPDMA_CH0_CFG (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x110)) + +/* DMA channel 1 registers */ +#define GPDMA_CH1_SRC (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x120)) +#define GPDMA_CH1_DEST (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x124)) +#define GPDMA_CH1_LLI (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x128)) +#define GPDMA_CH1_CTRL (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x12C)) +#define GPDMA_CH1_CFG (*(volatile unsigned long *)(DMA_BASE_ADDR + 0x130)) + + +/* USB Controller */ +#define USB_INT_BASE_ADDR 0xE01FC1C0 +#define USB_BASE_ADDR 0xFFE0C200 /* USB Base Address */ + +#define USB_INT_STAT (*(volatile unsigned long *)(USB_INT_BASE_ADDR + 0x00)) + +/* USB Device Interrupt Registers */ +#define DEV_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x00)) +#define DEV_INT_EN (*(volatile unsigned long *)(USB_BASE_ADDR + 0x04)) +#define DEV_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0x08)) +#define DEV_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0x0C)) +#define DEV_INT_PRIO (*(volatile unsigned long *)(USB_BASE_ADDR + 0x2C)) + +/* USB Device Endpoint Interrupt Registers */ +#define EP_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x30)) +#define EP_INT_EN (*(volatile unsigned long *)(USB_BASE_ADDR + 0x34)) +#define EP_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0x38)) +#define EP_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0x3C)) +#define EP_INT_PRIO (*(volatile unsigned long *)(USB_BASE_ADDR + 0x40)) + +/* USB Device Endpoint Realization Registers */ +#define REALIZE_EP (*(volatile unsigned long *)(USB_BASE_ADDR + 0x44)) +#define EP_INDEX (*(volatile unsigned long *)(USB_BASE_ADDR + 0x48)) +#define MAXPACKET_SIZE (*(volatile unsigned long *)(USB_BASE_ADDR + 0x4C)) + +/* USB Device Command Reagisters */ +#define CMD_CODE (*(volatile unsigned long *)(USB_BASE_ADDR + 0x10)) +#define CMD_DATA (*(volatile unsigned long *)(USB_BASE_ADDR + 0x14)) + +/* USB Device Data Transfer Registers */ +#define RX_DATA (*(volatile unsigned long *)(USB_BASE_ADDR + 0x18)) +#define TX_DATA (*(volatile unsigned long *)(USB_BASE_ADDR + 0x1C)) +#define RX_PLENGTH (*(volatile unsigned long *)(USB_BASE_ADDR + 0x20)) +#define TX_PLENGTH (*(volatile unsigned long *)(USB_BASE_ADDR + 0x24)) +#define USB_CTRL (*(volatile unsigned long *)(USB_BASE_ADDR + 0x28)) + +/* USB Device DMA Registers */ +#define DMA_REQ_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x50)) +#define DMA_REQ_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0x54)) +#define DMA_REQ_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0x58)) +#define UDCA_HEAD (*(volatile unsigned long *)(USB_BASE_ADDR + 0x80)) +#define EP_DMA_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x84)) +#define EP_DMA_EN (*(volatile unsigned long *)(USB_BASE_ADDR + 0x88)) +#define EP_DMA_DIS (*(volatile unsigned long *)(USB_BASE_ADDR + 0x8C)) +#define DMA_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0x90)) +#define DMA_INT_EN (*(volatile unsigned long *)(USB_BASE_ADDR + 0x94)) +#define EOT_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0xA0)) +#define EOT_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0xA4)) +#define EOT_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0xA8)) +#define NDD_REQ_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0xAC)) +#define NDD_REQ_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0xB0)) +#define NDD_REQ_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0xB4)) +#define SYS_ERR_INT_STAT (*(volatile unsigned long *)(USB_BASE_ADDR + 0xB8)) +#define SYS_ERR_INT_CLR (*(volatile unsigned long *)(USB_BASE_ADDR + 0xBC)) +#define SYS_ERR_INT_SET (*(volatile unsigned long *)(USB_BASE_ADDR + 0xC0)) + +/* USB Host and OTG registers are for LPC24xx only */ +/* USB Host Controller */ +#define USBHC_BASE_ADDR 0xFFE0C000 +#define HC_REVISION (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x00)) +#define HC_CONTROL (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x04)) +#define HC_CMD_STAT (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x08)) +#define HC_INT_STAT (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x0C)) +#define HC_INT_EN (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x10)) +#define HC_INT_DIS (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x14)) +#define HC_HCCA (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x18)) +#define HC_PERIOD_CUR_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x1C)) +#define HC_CTRL_HEAD_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x20)) +#define HC_CTRL_CUR_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x24)) +#define HC_BULK_HEAD_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x28)) +#define HC_BULK_CUR_ED (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x2C)) +#define HC_DONE_HEAD (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x30)) +#define HC_FM_INTERVAL (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x34)) +#define HC_FM_REMAINING (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x38)) +#define HC_FM_NUMBER (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x3C)) +#define HC_PERIOD_START (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x40)) +#define HC_LS_THRHLD (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x44)) +#define HC_RH_DESCA (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x48)) +#define HC_RH_DESCB (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x4C)) +#define HC_RH_STAT (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x50)) +#define HC_RH_PORT_STAT1 (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x54)) +#define HC_RH_PORT_STAT2 (*(volatile unsigned long *)(USBHC_BASE_ADDR + 0x58)) + +/* USB OTG Controller */ +#define USBOTG_BASE_ADDR 0xFFE0C100 +#define OTG_INT_STAT (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x00)) +#define OTG_INT_EN (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x04)) +#define OTG_INT_SET (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x08)) +#define OTG_INT_CLR (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x0C)) +/* On LPC23xx, the name is USBPortSel, on LPC24xx, the name is OTG_STAT_CTRL */ +#define OTG_STAT_CTRL (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x10)) +#define OTG_TIMER (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x14)) + +#define USBOTG_I2C_BASE_ADDR 0xFFE0C300 +#define OTG_I2C_RX (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x00)) +#define OTG_I2C_TX (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x00)) +#define OTG_I2C_STS (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x04)) +#define OTG_I2C_CTL (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x08)) +#define OTG_I2C_CLKHI (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x0C)) +#define OTG_I2C_CLKLO (*(volatile unsigned long *)(USBOTG_I2C_BASE_ADDR + 0x10)) + +/* On LPC23xx, the names are USBClkCtrl and USBClkSt; on LPC24xx, the names are +OTG_CLK_CTRL and OTG_CLK_STAT respectively. */ +#define USBOTG_CLK_BASE_ADDR 0xFFE0CFF0 +#define OTG_CLK_CTRL (*(volatile unsigned long *)(USBOTG_CLK_BASE_ADDR + 0x04)) +#define OTG_CLK_STAT (*(volatile unsigned long *)(USBOTG_CLK_BASE_ADDR + 0x08)) + +/* Note: below three register name convention is for LPC23xx USB device only, match +with the spec. update in USB Device Section. */ +#define USBPortSel (*(volatile unsigned long *)(USBOTG_BASE_ADDR + 0x10)) +#define USBClkCtrl (*(volatile unsigned long *)(USBOTG_CLK_BASE_ADDR + 0x04)) +#define USBClkSt (*(volatile unsigned long *)(USBOTG_CLK_BASE_ADDR + 0x08)) + +/* Ethernet MAC (32 bit data bus) -- all registers are RW unless indicated in parentheses */ +#define MAC_BASE_ADDR 0xFFE00000 /* AHB Peripheral # 0 */ +#define MAC_MAC1 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x000)) /* MAC config reg 1 */ +#define MAC_MAC2 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x004)) /* MAC config reg 2 */ +#define MAC_IPGT (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x008)) /* b2b InterPacketGap reg */ +#define MAC_IPGR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x00C)) /* non b2b InterPacketGap reg */ +#define MAC_CLRT (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x010)) /* CoLlision window/ReTry reg */ +#define MAC_MAXF (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x014)) /* MAXimum Frame reg */ +#define MAC_SUPP (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x018)) /* PHY SUPPort reg */ +#define MAC_TEST (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x01C)) /* TEST reg */ +#define MAC_MCFG (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x020)) /* MII Mgmt ConFiG reg */ +#define MAC_MCMD (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x024)) /* MII Mgmt CoMmanD reg */ +#define MAC_MADR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x028)) /* MII Mgmt ADdRess reg */ +#define MAC_MWTD (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x02C)) /* MII Mgmt WriTe Data reg (WO) */ +#define MAC_MRDD (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x030)) /* MII Mgmt ReaD Data reg (RO) */ +#define MAC_MIND (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x034)) /* MII Mgmt INDicators reg (RO) */ + +#define MAC_SA0 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x040)) /* Station Address 0 reg */ +#define MAC_SA1 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x044)) /* Station Address 1 reg */ +#define MAC_SA2 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x048)) /* Station Address 2 reg */ + +#define MAC_COMMAND (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x100)) /* Command reg */ +#define MAC_STATUS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x104)) /* Status reg (RO) */ +#define MAC_RXDESCRIPTOR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x108)) /* Rx descriptor base address reg */ +#define MAC_RXSTATUS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x10C)) /* Rx status base address reg */ +#define MAC_RXDESCRIPTORNUM (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x110)) /* Rx number of descriptors reg */ +#define MAC_RXPRODUCEINDEX (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x114)) /* Rx produce index reg (RO) */ +#define MAC_RXCONSUMEINDEX (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x118)) /* Rx consume index reg */ +#define MAC_TXDESCRIPTOR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x11C)) /* Tx descriptor base address reg */ +#define MAC_TXSTATUS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x120)) /* Tx status base address reg */ +#define MAC_TXDESCRIPTORNUM (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x124)) /* Tx number of descriptors reg */ +#define MAC_TXPRODUCEINDEX (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x128)) /* Tx produce index reg */ +#define MAC_TXCONSUMEINDEX (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x12C)) /* Tx consume index reg (RO) */ + +#define MAC_TSV0 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x158)) /* Tx status vector 0 reg (RO) */ +#define MAC_TSV1 (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x15C)) /* Tx status vector 1 reg (RO) */ +#define MAC_RSV (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x160)) /* Rx status vector reg (RO) */ + +#define MAC_FLOWCONTROLCNT (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x170)) /* Flow control counter reg */ +#define MAC_FLOWCONTROLSTS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x174)) /* Flow control status reg */ + +#define MAC_RXFILTERCTRL (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x200)) /* Rx filter ctrl reg */ +#define MAC_RXFILTERWOLSTS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x204)) /* Rx filter WoL status reg (RO) */ +#define MAC_RXFILTERWOLCLR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x208)) /* Rx filter WoL clear reg (WO) */ + +#define MAC_HASHFILTERL (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x210)) /* Hash filter LSBs reg */ +#define MAC_HASHFILTERH (*(volatile unsigned long *)(MAC_BASE_ADDR + 0x214)) /* Hash filter MSBs reg */ + +#define MAC_INTSTATUS (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFE0)) /* Interrupt status reg (RO) */ +#define MAC_INTENABLE (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFE4)) /* Interrupt enable reg */ +#define MAC_INTCLEAR (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFE8)) /* Interrupt clear reg (WO) */ +#define MAC_INTSET (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFEC)) /* Interrupt set reg (WO) */ + +#define MAC_POWERDOWN (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFF4)) /* Power-down reg */ +#define MAC_MODULEID (*(volatile unsigned long *)(MAC_BASE_ADDR + 0xFFC)) /* Module ID reg (RO) */ + + +#endif // __LPC23xx_H + diff --git a/doc/doxygen/src/riot-footer.html b/doc/doxygen/src/riot-footer.html index 73e46b97f..7fb2bd61b 100644 --- a/doc/doxygen/src/riot-footer.html +++ b/doc/doxygen/src/riot-footer.html @@ -1,2 +1,2 @@ - - + + diff --git a/sys/net/destiny/destiny.h b/sys/net/destiny/destiny.h index 77a01f926..d3f569063 100644 --- a/sys/net/destiny/destiny.h +++ b/sys/net/destiny/destiny.h @@ -1,13 +1,13 @@ -/* - * destiny.h - * - * Created on: 03.09.2011 - * Author: Oliver - */ - -#ifndef DESTINY_H_ -#define DESTINY_H_ - -void init_transport_layer(void); - -#endif /* DESTINY_H_ */ +/* + * destiny.h + * + * Created on: 03.09.2011 + * Author: Oliver + */ + +#ifndef DESTINY_H_ +#define DESTINY_H_ + +void init_transport_layer(void); + +#endif /* DESTINY_H_ */ diff --git a/sys/net/destiny/in.h b/sys/net/destiny/in.h index 0b3cf19d0..0c27dbaf2 100644 --- a/sys/net/destiny/in.h +++ b/sys/net/destiny/in.h @@ -1,133 +1,133 @@ -/* - * in.h - * - * Created on: 16.09.2011 - * Author: Oliver - */ - -#ifndef IN_H_ -#define IN_H_ -/* - * Constants and structures defined by the internet system, - * Per RFC 790, September 1981, and numerous additions. - */ - -/* - * Protocols (RFC 1700) - */ -#define IPPROTO_IP (0) /* dummy for IP */ -#define IPPROTO_HOPOPTS (0) /* IP6 hop-by-hop options */ -#define IPPROTO_ICMP (1) /* control message protocol */ -#define IPPROTO_IGMP (2) /* group mgmt protocol */ -#define IPPROTO_GGP (3) /* gateway^2 (deprecated) */ -#define IPPROTO_IPV4 (4) /* IPv4 encapsulation */ -#define IPPROTO_IPIP IPPROTO_IPV4 /* for compatibility */ -#define IPPROTO_TCP (6) /* tcp */ -#define IPPROTO_ST (7) /* Stream protocol II */ -#define IPPROTO_EGP (8) /* exterior gateway protocol */ -#define IPPROTO_PIGP (9) /* private interior gateway */ -#define IPPROTO_RCCMON (10) /* BBN RCC Monitoring */ -#define IPPROTO_NVPII (11) /* network voice protocol*/ -#define IPPROTO_PUP (12) /* pup */ -#define IPPROTO_ARGUS (13) /* Argus */ -#define IPPROTO_EMCON (14) /* EMCON */ -#define IPPROTO_XNET (15) /* Cross Net Debugger */ -#define IPPROTO_CHAOS (16) /* Chaos*/ -#define IPPROTO_UDP (17) /* user datagram protocol */ -#define IPPROTO_MUX (18) /* Multiplexing */ -#define IPPROTO_MEAS (19) /* DCN Measurement Subsystems */ -#define IPPROTO_HMP (20) /* Host Monitoring */ -#define IPPROTO_PRM (21) /* Packet Radio Measurement */ -#define IPPROTO_IDP (22) /* xns idp */ -#define IPPROTO_TRUNK1 (23) /* Trunk-1 */ -#define IPPROTO_TRUNK2 (24) /* Trunk-2 */ -#define IPPROTO_LEAF1 (25) /* Leaf-1 */ -#define IPPROTO_LEAF2 (26) /* Leaf-2 */ -#define IPPROTO_RDP (27) /* Reliable Data */ -#define IPPROTO_IRTP (28) /* Reliable Transaction */ -#define IPPROTO_TP (29) /* tp-4 w/ class negotiation */ -#define IPPROTO_BLT (30) /* Bulk Data Transfer */ -#define IPPROTO_NSP (31) /* Network Services */ -#define IPPROTO_INP (32) /* Merit Internodal */ -#define IPPROTO_SEP (33) /* Sequential Exchange */ -#define IPPROTO_3PC (34) /* Third Party Connect */ -#define IPPROTO_IDPR (35) /* InterDomain Policy Routing */ -#define IPPROTO_XTP (36) /* XTP */ -#define IPPROTO_DDP (37) /* Datagram Delivery */ -#define IPPROTO_CMTP (38) /* Control Message Transport */ -#define IPPROTO_TPXX (39) /* TP++ Transport */ -#define IPPROTO_IL (40) /* IL transport protocol */ -#define IPPROTO_IPV6 (41) /* IP6 header */ -#define IPPROTO_SDRP (42) /* Source Demand Routing */ -#define IPPROTO_ROUTING (43) /* IP6 routing header */ -#define IPPROTO_FRAGMENT (44) /* IP6 fragmentation header */ -#define IPPROTO_IDRP (45) /* InterDomain Routing*/ -#define IPPROTO_RSVP (46) /* resource reservation */ -#define IPPROTO_GRE (47) /* General Routing Encap. */ -#define IPPROTO_MHRP (48) /* Mobile Host Routing */ -#define IPPROTO_BHA (49) /* BHA */ -#define IPPROTO_ESP (50) /* IP6 Encap Sec. Payload */ -#define IPPROTO_AH (51) /* IP6 Auth Header */ -#define IPPROTO_INLSP (52) /* Integ. Net Layer Security */ -#define IPPROTO_SWIPE (53) /* IP with encryption */ -#define IPPROTO_NHRP (54) /* Next Hop Resolution */ -/* 55-57: Unassigned */ -#define IPPROTO_ICMPV6 (58) /* ICMP6 */ -#define IPPROTO_NONE (59) /* IP6 no next header */ -#define IPPROTO_DSTOPTS (60) /* IP6 destination option */ -#define IPPROTO_AHIP (61) /* any host internal protocol */ -#define IPPROTO_CFTP (62) /* CFTP */ -#define IPPROTO_HELLO (63) /* "hello" routing protocol */ -#define IPPROTO_SATEXPAK (64) /* SATNET/Backroom EXPAK */ -#define IPPROTO_KRYPTOLAN (65) /* Kryptolan */ -#define IPPROTO_RVD (66) /* Remote Virtual Disk */ -#define IPPROTO_IPPC (67) /* Pluribus Packet Core */ -#define IPPROTO_ADFS (68) /* Any distributed FS */ -#define IPPROTO_SATMON (69) /* Satnet Monitoring */ -#define IPPROTO_VISA (70) /* VISA Protocol */ -#define IPPROTO_IPCV (71) /* Packet Core Utility */ -#define IPPROTO_CPNX (72) /* Comp. Prot. Net. Executive */ -#define IPPROTO_CPHB (73) /* Comp. Prot. HeartBeat */ -#define IPPROTO_WSN (74) /* Wang Span Network */ -#define IPPROTO_PVP (75) /* Packet Video Protocol */ -#define IPPROTO_BRSATMON (76) /* BackRoom SATNET Monitoring */ -#define IPPROTO_ND (77) /* Sun net disk proto (temp.) */ -#define IPPROTO_WBMON (78) /* WIDEBAND Monitoring */ -#define IPPROTO_WBEXPAK (79) /* WIDEBAND EXPAK */ -#define IPPROTO_EON (80) /* ISO cnlp */ -#define IPPROTO_VMTP (81) /* VMTP */ -#define IPPROTO_SVMTP (82) /* Secure VMTP */ -#define IPPROTO_VINES (83) /* Banyon VINES */ -#define IPPROTO_TTP (84) /* TTP */ -#define IPPROTO_IGP (85) /* NSFNET-IGP */ -#define IPPROTO_DGP (86) /* dissimilar gateway prot. */ -#define IPPROTO_TCF (87) /* TCF */ -#define IPPROTO_IGRP (88) /* Cisco/GXS IGRP */ -#define IPPROTO_OSPFIGP (89) /* OSPFIGP */ -#define IPPROTO_SRPC (90) /* Strite RPC protocol */ -#define IPPROTO_LARP (91) /* Locus Address Resoloution */ -#define IPPROTO_MTP (92) /* Multicast Transport */ -#define IPPROTO_AX25 (93) /* AX.25 Frames */ -#define IPPROTO_IPEIP (94) /* IP encapsulated in IP */ -#define IPPROTO_MICP (95) /* Mobile Int.ing control */ -#define IPPROTO_SCCSP (96) /* Semaphore Comm. security */ -#define IPPROTO_ETHERIP (97) /* Ethernet IP encapsulation */ -#define IPPROTO_ENCAP (98) /* encapsulation header */ -#define IPPROTO_APES (99) /* any private encr. scheme */ -#define IPPROTO_GMTP (100) /* GMTP*/ -#define IPPROTO_IPCOMP (108) /* payload compression (IPComp) */ -/* 101-254: Partly Unassigned */ -#define IPPROTO_PIM (103) /* Protocol Independent Mcast */ -#define IPPROTO_PGM (113) /* PGM */ -/* 255: Reserved */ -/* BSD Private, local use, namespace incursion */ -#define IPPROTO_DIVERT (254) /* divert pseudo-protocol */ -#define IPPROTO_RAW (255) /* raw IP packet */ -#define IPPROTO_MAX (256) - -/* last return value of *_input(), meaning "all job for this pkt is done". */ -#define IPPROTO_DONE (257) - -#define IN_LOOPBACKNET (127) /* official! */ - -#endif /* IN_H_ */ +/* + * in.h + * + * Created on: 16.09.2011 + * Author: Oliver + */ + +#ifndef IN_H_ +#define IN_H_ +/* + * Constants and structures defined by the internet system, + * Per RFC 790, September 1981, and numerous additions. + */ + +/* + * Protocols (RFC 1700) + */ +#define IPPROTO_IP (0) /* dummy for IP */ +#define IPPROTO_HOPOPTS (0) /* IP6 hop-by-hop options */ +#define IPPROTO_ICMP (1) /* control message protocol */ +#define IPPROTO_IGMP (2) /* group mgmt protocol */ +#define IPPROTO_GGP (3) /* gateway^2 (deprecated) */ +#define IPPROTO_IPV4 (4) /* IPv4 encapsulation */ +#define IPPROTO_IPIP IPPROTO_IPV4 /* for compatibility */ +#define IPPROTO_TCP (6) /* tcp */ +#define IPPROTO_ST (7) /* Stream protocol II */ +#define IPPROTO_EGP (8) /* exterior gateway protocol */ +#define IPPROTO_PIGP (9) /* private interior gateway */ +#define IPPROTO_RCCMON (10) /* BBN RCC Monitoring */ +#define IPPROTO_NVPII (11) /* network voice protocol*/ +#define IPPROTO_PUP (12) /* pup */ +#define IPPROTO_ARGUS (13) /* Argus */ +#define IPPROTO_EMCON (14) /* EMCON */ +#define IPPROTO_XNET (15) /* Cross Net Debugger */ +#define IPPROTO_CHAOS (16) /* Chaos*/ +#define IPPROTO_UDP (17) /* user datagram protocol */ +#define IPPROTO_MUX (18) /* Multiplexing */ +#define IPPROTO_MEAS (19) /* DCN Measurement Subsystems */ +#define IPPROTO_HMP (20) /* Host Monitoring */ +#define IPPROTO_PRM (21) /* Packet Radio Measurement */ +#define IPPROTO_IDP (22) /* xns idp */ +#define IPPROTO_TRUNK1 (23) /* Trunk-1 */ +#define IPPROTO_TRUNK2 (24) /* Trunk-2 */ +#define IPPROTO_LEAF1 (25) /* Leaf-1 */ +#define IPPROTO_LEAF2 (26) /* Leaf-2 */ +#define IPPROTO_RDP (27) /* Reliable Data */ +#define IPPROTO_IRTP (28) /* Reliable Transaction */ +#define IPPROTO_TP (29) /* tp-4 w/ class negotiation */ +#define IPPROTO_BLT (30) /* Bulk Data Transfer */ +#define IPPROTO_NSP (31) /* Network Services */ +#define IPPROTO_INP (32) /* Merit Internodal */ +#define IPPROTO_SEP (33) /* Sequential Exchange */ +#define IPPROTO_3PC (34) /* Third Party Connect */ +#define IPPROTO_IDPR (35) /* InterDomain Policy Routing */ +#define IPPROTO_XTP (36) /* XTP */ +#define IPPROTO_DDP (37) /* Datagram Delivery */ +#define IPPROTO_CMTP (38) /* Control Message Transport */ +#define IPPROTO_TPXX (39) /* TP++ Transport */ +#define IPPROTO_IL (40) /* IL transport protocol */ +#define IPPROTO_IPV6 (41) /* IP6 header */ +#define IPPROTO_SDRP (42) /* Source Demand Routing */ +#define IPPROTO_ROUTING (43) /* IP6 routing header */ +#define IPPROTO_FRAGMENT (44) /* IP6 fragmentation header */ +#define IPPROTO_IDRP (45) /* InterDomain Routing*/ +#define IPPROTO_RSVP (46) /* resource reservation */ +#define IPPROTO_GRE (47) /* General Routing Encap. */ +#define IPPROTO_MHRP (48) /* Mobile Host Routing */ +#define IPPROTO_BHA (49) /* BHA */ +#define IPPROTO_ESP (50) /* IP6 Encap Sec. Payload */ +#define IPPROTO_AH (51) /* IP6 Auth Header */ +#define IPPROTO_INLSP (52) /* Integ. Net Layer Security */ +#define IPPROTO_SWIPE (53) /* IP with encryption */ +#define IPPROTO_NHRP (54) /* Next Hop Resolution */ +/* 55-57: Unassigned */ +#define IPPROTO_ICMPV6 (58) /* ICMP6 */ +#define IPPROTO_NONE (59) /* IP6 no next header */ +#define IPPROTO_DSTOPTS (60) /* IP6 destination option */ +#define IPPROTO_AHIP (61) /* any host internal protocol */ +#define IPPROTO_CFTP (62) /* CFTP */ +#define IPPROTO_HELLO (63) /* "hello" routing protocol */ +#define IPPROTO_SATEXPAK (64) /* SATNET/Backroom EXPAK */ +#define IPPROTO_KRYPTOLAN (65) /* Kryptolan */ +#define IPPROTO_RVD (66) /* Remote Virtual Disk */ +#define IPPROTO_IPPC (67) /* Pluribus Packet Core */ +#define IPPROTO_ADFS (68) /* Any distributed FS */ +#define IPPROTO_SATMON (69) /* Satnet Monitoring */ +#define IPPROTO_VISA (70) /* VISA Protocol */ +#define IPPROTO_IPCV (71) /* Packet Core Utility */ +#define IPPROTO_CPNX (72) /* Comp. Prot. Net. Executive */ +#define IPPROTO_CPHB (73) /* Comp. Prot. HeartBeat */ +#define IPPROTO_WSN (74) /* Wang Span Network */ +#define IPPROTO_PVP (75) /* Packet Video Protocol */ +#define IPPROTO_BRSATMON (76) /* BackRoom SATNET Monitoring */ +#define IPPROTO_ND (77) /* Sun net disk proto (temp.) */ +#define IPPROTO_WBMON (78) /* WIDEBAND Monitoring */ +#define IPPROTO_WBEXPAK (79) /* WIDEBAND EXPAK */ +#define IPPROTO_EON (80) /* ISO cnlp */ +#define IPPROTO_VMTP (81) /* VMTP */ +#define IPPROTO_SVMTP (82) /* Secure VMTP */ +#define IPPROTO_VINES (83) /* Banyon VINES */ +#define IPPROTO_TTP (84) /* TTP */ +#define IPPROTO_IGP (85) /* NSFNET-IGP */ +#define IPPROTO_DGP (86) /* dissimilar gateway prot. */ +#define IPPROTO_TCF (87) /* TCF */ +#define IPPROTO_IGRP (88) /* Cisco/GXS IGRP */ +#define IPPROTO_OSPFIGP (89) /* OSPFIGP */ +#define IPPROTO_SRPC (90) /* Strite RPC protocol */ +#define IPPROTO_LARP (91) /* Locus Address Resoloution */ +#define IPPROTO_MTP (92) /* Multicast Transport */ +#define IPPROTO_AX25 (93) /* AX.25 Frames */ +#define IPPROTO_IPEIP (94) /* IP encapsulated in IP */ +#define IPPROTO_MICP (95) /* Mobile Int.ing control */ +#define IPPROTO_SCCSP (96) /* Semaphore Comm. security */ +#define IPPROTO_ETHERIP (97) /* Ethernet IP encapsulation */ +#define IPPROTO_ENCAP (98) /* encapsulation header */ +#define IPPROTO_APES (99) /* any private encr. scheme */ +#define IPPROTO_GMTP (100) /* GMTP*/ +#define IPPROTO_IPCOMP (108) /* payload compression (IPComp) */ +/* 101-254: Partly Unassigned */ +#define IPPROTO_PIM (103) /* Protocol Independent Mcast */ +#define IPPROTO_PGM (113) /* PGM */ +/* 255: Reserved */ +/* BSD Private, local use, namespace incursion */ +#define IPPROTO_DIVERT (254) /* divert pseudo-protocol */ +#define IPPROTO_RAW (255) /* raw IP packet */ +#define IPPROTO_MAX (256) + +/* last return value of *_input(), meaning "all job for this pkt is done". */ +#define IPPROTO_DONE (257) + +#define IN_LOOPBACKNET (127) /* official! */ + +#endif /* IN_H_ */ diff --git a/sys/net/destiny/socket.h b/sys/net/destiny/socket.h index 5fb61ab54..d7bd07ee2 100644 --- a/sys/net/destiny/socket.h +++ b/sys/net/destiny/socket.h @@ -1,248 +1,248 @@ -/** - * Destiny socket API - * - * Copyright (C) 2013 INRIA. - * - * This file subject to the terms and conditions of the GNU Lesser General - * Public License. See the file LICENSE in the top level directory for more - * details. - * - * @ingroup destiny - * @{ - * @file socket.h - * @brief header for BSD socket API - * @author Oliver Gesch - * @} - */ - - -#ifndef SOCKET_H_ -#define SOCKET_H_ - -#include -#include "tcp.h" -#include "udp.h" -#include "in.h" -#include "../sixlowpan/sixlowip.h" - -/* - * POSIX compatibility - */ -typedef uint8_t sa_family_t; -typedef uint32_t socklen_t; - -/* - * Types - */ -#define SOCK_STREAM 1 /* stream socket */ -#define SOCK_DGRAM 2 /* datagram socket */ -#define SOCK_RAW 3 /* raw-protocol interface */ -#define SOCK_RDM 4 /* reliably-delivered message */ -#define SOCK_SEQPACKET 5 /* sequenced packet stream */ - -/* - * Address families. - */ -#define AF_UNSPEC 0 /* unspecified */ -#define AF_LOCAL 1 /* local to host (pipes, portals) */ -#define AF_UNIX AF_LOCAL /* backward compatibility */ -#define AF_INET 2 /* internetwork: UDP, TCP, etc. */ -#define AF_IMPLINK 3 /* arpanet imp addresses */ -#define AF_PUP 4 /* pup protocols: e.g. BSP */ -#define AF_CHAOS 5 /* mit CHAOS protocols */ -#define AF_NS 6 /* XEROX NS protocols */ -#define AF_ISO 7 /* ISO protocols */ -#define AF_OSI AF_ISO -#define AF_ECMA 8 /* European computer manufacturers */ -#define AF_DATAKIT 9 /* datakit protocols */ -#define AF_CCITT 10 /* CCITT protocols, X.25 etc */ -#define AF_SNA 11 /* IBM SNA */ -#define AF_DECnet 12 /* DECnet */ -#define AF_DLI 13 /* DEC Direct data link interface */ -#define AF_LAT 14 /* LAT */ -#define AF_HYLINK 15 /* NSC Hyperchannel */ -#define AF_APPLETALK 16 /* Apple Talk */ -#define AF_ROUTE 17 /* Internal Routing Protocol */ -#define AF_LINK 18 /* Link layer interface */ -#define pseudo_AF_XTP 19 /* eXpress Transfer Protocol (no AF) */ -#define AF_COIP 20 /* connection-oriented IP, aka ST II */ -#define AF_CNT 21 /* Computer Network Technology */ -#define pseudo_AF_RTIP 22 /* Help Identify RTIP packets */ -#define AF_IPX 23 /* Novell Internet Protocol */ -#define AF_SIP 24 /* Simple Internet Protocol */ -#define pseudo_AF_PIP 25 /* Help Identify PIP packets */ -#define AF_ISDN 26 /* Integrated Services Digital Network*/ -#define AF_E164 AF_ISDN /* CCITT E.164 recommendation */ -#define pseudo_AF_KEY 27 /* Internal key-management function */ -#define AF_INET6 28 /* IPv6 */ -#define AF_NATM 29 /* native ATM access */ -#define AF_ATM 30 /* ATM */ -#define pseudo_AF_HDRCMPLT 31 /* Used by BPF to not rewrite headers - * in interface output routine - */ -#define AF_NETGRAPH 32 /* Netgraph sockets */ -#define AF_MAX 33 - -/* - * Protocol families, same as address families for now. - */ -#define PF_UNSPEC AF_UNSPEC -#define PF_LOCAL AF_LOCAL -#define PF_UNIX PF_LOCAL /* backward compatibility */ -#define PF_INET AF_INET -#define PF_IMPLINK AF_IMPLINK -#define PF_PUP AF_PUP -#define PF_CHAOS AF_CHAOS -#define PF_NS AF_NS -#define PF_ISO AF_ISO -#define PF_OSI AF_ISO -#define PF_ECMA AF_ECMA -#define PF_DATAKIT AF_DATAKIT -#define PF_CCITT AF_CCITT -#define PF_SNA AF_SNA -#define PF_DECnet AF_DECnet -#define PF_DLI AF_DLI -#define PF_LAT AF_LAT -#define PF_HYLINK AF_HYLINK -#define PF_APPLETALK AF_APPLETALK -#define PF_ROUTE AF_ROUTE -#define PF_LINK AF_LINK -#define PF_XTP pseudo_AF_XTP /* really just proto family, no AF */ -#define PF_COIP AF_COIP -#define PF_CNT AF_CNT -#define PF_SIP AF_SIP -#define PF_IPX AF_IPX /* same format as AF_NS */ -#define PF_RTIP pseudo_AF_RTIP /* same format as AF_INET */ -#define PF_PIP pseudo_AF_PIP -#define PF_ISDN AF_ISDN -#define PF_KEY pseudo_AF_KEY -#define PF_INET6 AF_INET6 -#define PF_NATM AF_NATM -#define PF_ATM AF_ATM -#define PF_NETGRAPH AF_NETGRAPH -#define PF_MAX AF_MAX - -#define MAX_SOCKETS 5 -// #define MAX_QUEUED_SOCKETS 2 - -#define EPHEMERAL_PORTS 49152 - -#define STATIC_MSS 48 -#define STATIC_WINDOW 1 * STATIC_MSS -#define MAX_TCP_BUFFER 1 * STATIC_WINDOW - -#define INC_PACKET 0 -#define OUT_PACKET 1 - -#define SEND_MSG_BUF_SIZE 64 - -typedef struct socka6 { - uint8_t sin6_family; /* AF_INET6 */ - uint16_t sin6_port; /* transport layer port # */ - uint32_t sin6_flowinfo; /* IPv6 flow information */ - ipv6_addr_t sin6_addr; /* IPv6 address */ -} sockaddr6_t; - -typedef struct tcp_hc_con { - uint16_t context_id; - uint32_t seq_rcv; // Last received packet values - uint32_t ack_rcv; - uint16_t wnd_rcv; - uint32_t seq_snd; // Last sent packet values - uint32_t ack_snd; - uint16_t wnd_snd; - uint8_t hc_type; -} tcp_hc_context_t; - -typedef struct tcp_control_block { - uint32_t send_una; - uint32_t send_nxt; - uint16_t send_wnd; - uint32_t send_iss; - - uint32_t rcv_nxt; - uint16_t rcv_wnd; - uint32_t rcv_irs; - - timex_t last_packet_time; - uint8_t no_of_retries; - uint16_t mss; - - uint8_t state; - - double srtt; - double rttvar; - double rto; - -#ifdef TCP_HC - tcp_hc_context_t tcp_context; -#endif - -} tcp_cb_t; - -typedef struct sock_t { - uint8_t domain; - uint8_t type; - uint8_t protocol; - tcp_cb_t tcp_control; - sockaddr6_t local_address; - sockaddr6_t foreign_address; -} socket_t; - -typedef struct socket_in_t { - uint8_t socket_id; - uint8_t recv_pid; - uint8_t send_pid; - uint8_t tcp_input_buffer_end; - mutex_t tcp_buffer_mutex; - socket_t socket_values; - uint8_t tcp_input_buffer[MAX_TCP_BUFFER]; -} socket_internal_t; - -extern socket_internal_t sockets[MAX_SOCKETS]; - -int socket(int domain, int type, int protocol); -int connect(int socket, sockaddr6_t *addr, socklen_t addrlen); -socket_internal_t *getWaitingConnectionSocket(int socket, - ipv6_hdr_t *ipv6_header, - tcp_hdr_t *tcp_header); -void close_socket(socket_internal_t *current_socket); -int32_t recvfrom(int s, void *buf, uint32_t len, int flags, sockaddr6_t *from, - socklen_t *fromlen); -int32_t sendto(int s, const void *msg, uint32_t len, int flags, - sockaddr6_t *to, socklen_t tolen); -int32_t send(int s, void *msg, uint32_t len, int flags); -int recv(int s, void *buf, uint32_t len, int flags); -int close(int s); -int bind(int s, sockaddr6_t *name, int namelen); -int listen(int s, int backlog); -int accept(int s, sockaddr6_t *addr, socklen_t *addrlen); -void socket_init(void); -socket_internal_t *get_udp_socket(ipv6_hdr_t *ipv6_header, udp_hdr_t *udp_header); -socket_internal_t *get_tcp_socket(ipv6_hdr_t *ipv6_header, tcp_hdr_t *tcp_header); -socket_internal_t *getSocket(uint8_t s); -void print_sockets(void); -void print_internal_socket(socket_internal_t *current_socket_internal); -void print_socket(socket_t *current_socket); -void printf_tcp_context(tcp_hc_context_t *current_tcp_context); -bool exists_socket(uint8_t socket); -socket_internal_t *new_tcp_queued_socket(ipv6_hdr_t *ipv6_header, - tcp_hdr_t *tcp_header); -void print_tcp_status(int in_or_out, ipv6_hdr_t *ipv6_header, - tcp_hdr_t *tcp_header, socket_t *tcp_socket); -void set_socket_address(sockaddr6_t *sockaddr, sa_family_t sin6_family, - uint16_t sin6_port, uint32_t sin6_flowinfo, - ipv6_addr_t *sin6_addr); -void set_tcp_cb(tcp_cb_t *tcp_control, uint32_t rcv_nxt, uint16_t rcv_wnd, - uint32_t send_nxt, uint32_t send_una, uint16_t send_wnd); -void set_tcp_packet(tcp_hdr_t *tcp_hdr, uint16_t src_port, uint16_t dst_port, - uint32_t seq_nr, uint32_t ack_nr, - uint8_t dataOffset_reserved, uint8_t reserved_flags, - uint16_t window, uint16_t checksum, uint16_t urg_pointer); -int check_tcp_consistency(socket_t *current_tcp_socket, tcp_hdr_t *tcp_header); -void switch_tcp_packet_byte_order(tcp_hdr_t *current_tcp_packet); -int send_tcp(socket_internal_t *current_socket, tcp_hdr_t *current_tcp_packet, - ipv6_hdr_t *temp_ipv6_header, uint8_t flags, - uint8_t payload_length); -bool isTCPSocket(uint8_t s); -#endif /* SOCKET_H_ */ +/** + * Destiny socket API + * + * Copyright (C) 2013 INRIA. + * + * This file subject to the terms and conditions of the GNU Lesser General + * Public License. See the file LICENSE in the top level directory for more + * details. + * + * @ingroup destiny + * @{ + * @file socket.h + * @brief header for BSD socket API + * @author Oliver Gesch + * @} + */ + + +#ifndef SOCKET_H_ +#define SOCKET_H_ + +#include +#include "tcp.h" +#include "udp.h" +#include "in.h" +#include "../sixlowpan/sixlowip.h" + +/* + * POSIX compatibility + */ +typedef uint8_t sa_family_t; +typedef uint32_t socklen_t; + +/* + * Types + */ +#define SOCK_STREAM 1 /* stream socket */ +#define SOCK_DGRAM 2 /* datagram socket */ +#define SOCK_RAW 3 /* raw-protocol interface */ +#define SOCK_RDM 4 /* reliably-delivered message */ +#define SOCK_SEQPACKET 5 /* sequenced packet stream */ + +/* + * Address families. + */ +#define AF_UNSPEC 0 /* unspecified */ +#define AF_LOCAL 1 /* local to host (pipes, portals) */ +#define AF_UNIX AF_LOCAL /* backward compatibility */ +#define AF_INET 2 /* internetwork: UDP, TCP, etc. */ +#define AF_IMPLINK 3 /* arpanet imp addresses */ +#define AF_PUP 4 /* pup protocols: e.g. BSP */ +#define AF_CHAOS 5 /* mit CHAOS protocols */ +#define AF_NS 6 /* XEROX NS protocols */ +#define AF_ISO 7 /* ISO protocols */ +#define AF_OSI AF_ISO +#define AF_ECMA 8 /* European computer manufacturers */ +#define AF_DATAKIT 9 /* datakit protocols */ +#define AF_CCITT 10 /* CCITT protocols, X.25 etc */ +#define AF_SNA 11 /* IBM SNA */ +#define AF_DECnet 12 /* DECnet */ +#define AF_DLI 13 /* DEC Direct data link interface */ +#define AF_LAT 14 /* LAT */ +#define AF_HYLINK 15 /* NSC Hyperchannel */ +#define AF_APPLETALK 16 /* Apple Talk */ +#define AF_ROUTE 17 /* Internal Routing Protocol */ +#define AF_LINK 18 /* Link layer interface */ +#define pseudo_AF_XTP 19 /* eXpress Transfer Protocol (no AF) */ +#define AF_COIP 20 /* connection-oriented IP, aka ST II */ +#define AF_CNT 21 /* Computer Network Technology */ +#define pseudo_AF_RTIP 22 /* Help Identify RTIP packets */ +#define AF_IPX 23 /* Novell Internet Protocol */ +#define AF_SIP 24 /* Simple Internet Protocol */ +#define pseudo_AF_PIP 25 /* Help Identify PIP packets */ +#define AF_ISDN 26 /* Integrated Services Digital Network*/ +#define AF_E164 AF_ISDN /* CCITT E.164 recommendation */ +#define pseudo_AF_KEY 27 /* Internal key-management function */ +#define AF_INET6 28 /* IPv6 */ +#define AF_NATM 29 /* native ATM access */ +#define AF_ATM 30 /* ATM */ +#define pseudo_AF_HDRCMPLT 31 /* Used by BPF to not rewrite headers + * in interface output routine + */ +#define AF_NETGRAPH 32 /* Netgraph sockets */ +#define AF_MAX 33 + +/* + * Protocol families, same as address families for now. + */ +#define PF_UNSPEC AF_UNSPEC +#define PF_LOCAL AF_LOCAL +#define PF_UNIX PF_LOCAL /* backward compatibility */ +#define PF_INET AF_INET +#define PF_IMPLINK AF_IMPLINK +#define PF_PUP AF_PUP +#define PF_CHAOS AF_CHAOS +#define PF_NS AF_NS +#define PF_ISO AF_ISO +#define PF_OSI AF_ISO +#define PF_ECMA AF_ECMA +#define PF_DATAKIT AF_DATAKIT +#define PF_CCITT AF_CCITT +#define PF_SNA AF_SNA +#define PF_DECnet AF_DECnet +#define PF_DLI AF_DLI +#define PF_LAT AF_LAT +#define PF_HYLINK AF_HYLINK +#define PF_APPLETALK AF_APPLETALK +#define PF_ROUTE AF_ROUTE +#define PF_LINK AF_LINK +#define PF_XTP pseudo_AF_XTP /* really just proto family, no AF */ +#define PF_COIP AF_COIP +#define PF_CNT AF_CNT +#define PF_SIP AF_SIP +#define PF_IPX AF_IPX /* same format as AF_NS */ +#define PF_RTIP pseudo_AF_RTIP /* same format as AF_INET */ +#define PF_PIP pseudo_AF_PIP +#define PF_ISDN AF_ISDN +#define PF_KEY pseudo_AF_KEY +#define PF_INET6 AF_INET6 +#define PF_NATM AF_NATM +#define PF_ATM AF_ATM +#define PF_NETGRAPH AF_NETGRAPH +#define PF_MAX AF_MAX + +#define MAX_SOCKETS 5 +// #define MAX_QUEUED_SOCKETS 2 + +#define EPHEMERAL_PORTS 49152 + +#define STATIC_MSS 48 +#define STATIC_WINDOW 1 * STATIC_MSS +#define MAX_TCP_BUFFER 1 * STATIC_WINDOW + +#define INC_PACKET 0 +#define OUT_PACKET 1 + +#define SEND_MSG_BUF_SIZE 64 + +typedef struct socka6 { + uint8_t sin6_family; /* AF_INET6 */ + uint16_t sin6_port; /* transport layer port # */ + uint32_t sin6_flowinfo; /* IPv6 flow information */ + ipv6_addr_t sin6_addr; /* IPv6 address */ +} sockaddr6_t; + +typedef struct tcp_hc_con { + uint16_t context_id; + uint32_t seq_rcv; // Last received packet values + uint32_t ack_rcv; + uint16_t wnd_rcv; + uint32_t seq_snd; // Last sent packet values + uint32_t ack_snd; + uint16_t wnd_snd; + uint8_t hc_type; +} tcp_hc_context_t; + +typedef struct tcp_control_block { + uint32_t send_una; + uint32_t send_nxt; + uint16_t send_wnd; + uint32_t send_iss; + + uint32_t rcv_nxt; + uint16_t rcv_wnd; + uint32_t rcv_irs; + + timex_t last_packet_time; + uint8_t no_of_retries; + uint16_t mss; + + uint8_t state; + + double srtt; + double rttvar; + double rto; + +#ifdef TCP_HC + tcp_hc_context_t tcp_context; +#endif + +} tcp_cb_t; + +typedef struct sock_t { + uint8_t domain; + uint8_t type; + uint8_t protocol; + tcp_cb_t tcp_control; + sockaddr6_t local_address; + sockaddr6_t foreign_address; +} socket_t; + +typedef struct socket_in_t { + uint8_t socket_id; + uint8_t recv_pid; + uint8_t send_pid; + uint8_t tcp_input_buffer_end; + mutex_t tcp_buffer_mutex; + socket_t socket_values; + uint8_t tcp_input_buffer[MAX_TCP_BUFFER]; +} socket_internal_t; + +extern socket_internal_t sockets[MAX_SOCKETS]; + +int socket(int domain, int type, int protocol); +int connect(int socket, sockaddr6_t *addr, socklen_t addrlen); +socket_internal_t *getWaitingConnectionSocket(int socket, + ipv6_hdr_t *ipv6_header, + tcp_hdr_t *tcp_header); +void close_socket(socket_internal_t *current_socket); +int32_t recvfrom(int s, void *buf, uint32_t len, int flags, sockaddr6_t *from, + socklen_t *fromlen); +int32_t sendto(int s, const void *msg, uint32_t len, int flags, + sockaddr6_t *to, socklen_t tolen); +int32_t send(int s, void *msg, uint32_t len, int flags); +int recv(int s, void *buf, uint32_t len, int flags); +int close(int s); +int bind(int s, sockaddr6_t *name, int namelen); +int listen(int s, int backlog); +int accept(int s, sockaddr6_t *addr, socklen_t *addrlen); +void socket_init(void); +socket_internal_t *get_udp_socket(ipv6_hdr_t *ipv6_header, udp_hdr_t *udp_header); +socket_internal_t *get_tcp_socket(ipv6_hdr_t *ipv6_header, tcp_hdr_t *tcp_header); +socket_internal_t *getSocket(uint8_t s); +void print_sockets(void); +void print_internal_socket(socket_internal_t *current_socket_internal); +void print_socket(socket_t *current_socket); +void printf_tcp_context(tcp_hc_context_t *current_tcp_context); +bool exists_socket(uint8_t socket); +socket_internal_t *new_tcp_queued_socket(ipv6_hdr_t *ipv6_header, + tcp_hdr_t *tcp_header); +void print_tcp_status(int in_or_out, ipv6_hdr_t *ipv6_header, + tcp_hdr_t *tcp_header, socket_t *tcp_socket); +void set_socket_address(sockaddr6_t *sockaddr, sa_family_t sin6_family, + uint16_t sin6_port, uint32_t sin6_flowinfo, + ipv6_addr_t *sin6_addr); +void set_tcp_cb(tcp_cb_t *tcp_control, uint32_t rcv_nxt, uint16_t rcv_wnd, + uint32_t send_nxt, uint32_t send_una, uint16_t send_wnd); +void set_tcp_packet(tcp_hdr_t *tcp_hdr, uint16_t src_port, uint16_t dst_port, + uint32_t seq_nr, uint32_t ack_nr, + uint8_t dataOffset_reserved, uint8_t reserved_flags, + uint16_t window, uint16_t checksum, uint16_t urg_pointer); +int check_tcp_consistency(socket_t *current_tcp_socket, tcp_hdr_t *tcp_header); +void switch_tcp_packet_byte_order(tcp_hdr_t *current_tcp_packet); +int send_tcp(socket_internal_t *current_socket, tcp_hdr_t *current_tcp_packet, + ipv6_hdr_t *temp_ipv6_header, uint8_t flags, + uint8_t payload_length); +bool isTCPSocket(uint8_t s); +#endif /* SOCKET_H_ */ diff --git a/sys/net/destiny/tcp.h b/sys/net/destiny/tcp.h index 6b58a29f7..28a1c2297 100644 --- a/sys/net/destiny/tcp.h +++ b/sys/net/destiny/tcp.h @@ -1,114 +1,114 @@ -/** - * Destiny TCP header - * - * Copyright (C) 2013 INRIA. - * - * This file subject to the terms and conditions of the GNU Lesser General - * Public License. See the file LICENSE in the top level directory for more - * details. - * - * @ingroup destiny - * @{ - * @file tcp.c - * @brief TCP data structs and prototypes - * @author Oliver Gesch - * @} - */ - -#ifndef TCP_H_ -#define TCP_H_ - -#define TCP_HDR_LEN 20 - -#define TCP_EOO_OPTION 0x00 // End of option list -#define TCP_NOP_OPTION 0x01 // No operation -#define TCP_MSS_OPTION 0x02 // Maximum segment size -#define TCP_WSF_OPTION 0x03 // Window scale factor -#define TCP_TS_OPTION 0x08 // Timestamp - -enum tcp_flags { - TCP_ACK = 0x08, - TCP_URG_PSH = 0x14, - TCP_RST = 0x20, - TCP_SYN = 0x40, - TCP_SYN_ACK = 0x48, - TCP_FIN = 0x80, - TCP_FIN_ACK = 0x88 -}; - -enum tcp_states { - CLOSED = 0, - LISTEN = 1, - SYN_SENT = 2, - SYN_RCVD = 3, - ESTABLISHED = 4, - FIN_WAIT_1 = 5, - FIN_WAIT_2 = 6, - CLOSE_WAIT = 7, - CLOSING = 8, - LAST_ACK = 9, - TIME_WAIT = 10, - UNKNOWN = 11 -}; - -enum tcp_codes { - UNDEFINED = 0, - PACKET_OK = 1, - CLOSE_CONN = 2, - SEQ_NO_TOO_SMALL = 3, - ACK_NO_TOO_SMALL = 4, - ACK_NO_TOO_BIG = 5 -}; - -#define REMOVE_RESERVED 0xFC - -#define IS_TCP_ACK(a) ((a & TCP_ACK) == TCP_ACK) // Test for ACK flag only, ignore URG und PSH flag -#define IS_TCP_RST(a) ((a & TCP_RST) == TCP_RST) -#define IS_TCP_SYN(a) ((a & TCP_SYN) == TCP_SYN) -#define IS_TCP_SYN_ACK(a) ((a & TCP_SYN_ACK) == TCP_SYN_ACK) -#define IS_TCP_FIN(a) ((a & TCP_FIN) == TCP_FIN) -#define IS_TCP_FIN_ACK(a) ((a & TCP_FIN_ACK) == TCP_FIN_ACK) - -#define SET_TCP_ACK(a) a = ((a & 0x00) | TCP_ACK) -#define SET_TCP_RST(a) a = ((a & 0x00) | TCP_RST) -#define SET_TCP_SYN(a) a = ((a & 0x00) | TCP_SYN) -#define SET_TCP_SYN_ACK(a) a = ((a & 0x00) | TCP_SYN_ACK) -#define SET_TCP_FIN(a) a = ((a & 0x00) | TCP_FIN) -#define SET_TCP_FIN_ACK(a) a = ((a & 0x00) | TCP_FIN_ACK) - -#define TCP_STACK_SIZE 1024 - -#include "../sixlowpan/sixlowip.h" - -typedef struct __attribute__((packed)) tcp_mms_o_t { - uint8_t kind; - uint8_t len; - uint16_t mss; -} tcp_mss_option_t; - -typedef struct __attribute__((packed)) tcp_h_t { - uint16_t src_port; - uint16_t dst_port; - uint32_t seq_nr; - uint32_t ack_nr; - uint8_t dataOffset_reserved; - uint8_t reserved_flags; - uint16_t window; - uint16_t checksum; - uint16_t urg_pointer; -} tcp_hdr_t; - -#ifdef TCP_HC -mutex_t global_context_counter_mutex; -uint8_t global_context_counter; -#endif - -mutex_t global_sequence_clunter_mutex; -uint32_t global_sequence_counter; - -void tcp_packet_handler(void); -uint16_t tcp_csum(ipv6_hdr_t *ipv6_header, tcp_hdr_t *tcp_header); -void printTCPHeader(tcp_hdr_t *tcp_header); -void printArrayRange_tcp(uint8_t *udp_header, uint16_t len); - -#endif /* TCP_H_ */ +/** + * Destiny TCP header + * + * Copyright (C) 2013 INRIA. + * + * This file subject to the terms and conditions of the GNU Lesser General + * Public License. See the file LICENSE in the top level directory for more + * details. + * + * @ingroup destiny + * @{ + * @file tcp.c + * @brief TCP data structs and prototypes + * @author Oliver Gesch + * @} + */ + +#ifndef TCP_H_ +#define TCP_H_ + +#define TCP_HDR_LEN 20 + +#define TCP_EOO_OPTION 0x00 // End of option list +#define TCP_NOP_OPTION 0x01 // No operation +#define TCP_MSS_OPTION 0x02 // Maximum segment size +#define TCP_WSF_OPTION 0x03 // Window scale factor +#define TCP_TS_OPTION 0x08 // Timestamp + +enum tcp_flags { + TCP_ACK = 0x08, + TCP_URG_PSH = 0x14, + TCP_RST = 0x20, + TCP_SYN = 0x40, + TCP_SYN_ACK = 0x48, + TCP_FIN = 0x80, + TCP_FIN_ACK = 0x88 +}; + +enum tcp_states { + CLOSED = 0, + LISTEN = 1, + SYN_SENT = 2, + SYN_RCVD = 3, + ESTABLISHED = 4, + FIN_WAIT_1 = 5, + FIN_WAIT_2 = 6, + CLOSE_WAIT = 7, + CLOSING = 8, + LAST_ACK = 9, + TIME_WAIT = 10, + UNKNOWN = 11 +}; + +enum tcp_codes { + UNDEFINED = 0, + PACKET_OK = 1, + CLOSE_CONN = 2, + SEQ_NO_TOO_SMALL = 3, + ACK_NO_TOO_SMALL = 4, + ACK_NO_TOO_BIG = 5 +}; + +#define REMOVE_RESERVED 0xFC + +#define IS_TCP_ACK(a) ((a & TCP_ACK) == TCP_ACK) // Test for ACK flag only, ignore URG und PSH flag +#define IS_TCP_RST(a) ((a & TCP_RST) == TCP_RST) +#define IS_TCP_SYN(a) ((a & TCP_SYN) == TCP_SYN) +#define IS_TCP_SYN_ACK(a) ((a & TCP_SYN_ACK) == TCP_SYN_ACK) +#define IS_TCP_FIN(a) ((a & TCP_FIN) == TCP_FIN) +#define IS_TCP_FIN_ACK(a) ((a & TCP_FIN_ACK) == TCP_FIN_ACK) + +#define SET_TCP_ACK(a) a = ((a & 0x00) | TCP_ACK) +#define SET_TCP_RST(a) a = ((a & 0x00) | TCP_RST) +#define SET_TCP_SYN(a) a = ((a & 0x00) | TCP_SYN) +#define SET_TCP_SYN_ACK(a) a = ((a & 0x00) | TCP_SYN_ACK) +#define SET_TCP_FIN(a) a = ((a & 0x00) | TCP_FIN) +#define SET_TCP_FIN_ACK(a) a = ((a & 0x00) | TCP_FIN_ACK) + +#define TCP_STACK_SIZE 1024 + +#include "../sixlowpan/sixlowip.h" + +typedef struct __attribute__((packed)) tcp_mms_o_t { + uint8_t kind; + uint8_t len; + uint16_t mss; +} tcp_mss_option_t; + +typedef struct __attribute__((packed)) tcp_h_t { + uint16_t src_port; + uint16_t dst_port; + uint32_t seq_nr; + uint32_t ack_nr; + uint8_t dataOffset_reserved; + uint8_t reserved_flags; + uint16_t window; + uint16_t checksum; + uint16_t urg_pointer; +} tcp_hdr_t; + +#ifdef TCP_HC +mutex_t global_context_counter_mutex; +uint8_t global_context_counter; +#endif + +mutex_t global_sequence_clunter_mutex; +uint32_t global_sequence_counter; + +void tcp_packet_handler(void); +uint16_t tcp_csum(ipv6_hdr_t *ipv6_header, tcp_hdr_t *tcp_header); +void printTCPHeader(tcp_hdr_t *tcp_header); +void printArrayRange_tcp(uint8_t *udp_header, uint16_t len); + +#endif /* TCP_H_ */ diff --git a/sys/net/destiny/tcp_hc.c b/sys/net/destiny/tcp_hc.c index 707b7af54..f8d52671d 100644 --- a/sys/net/destiny/tcp_hc.c +++ b/sys/net/destiny/tcp_hc.c @@ -1,633 +1,633 @@ -/** - * Destiny TCP header compression - * - * Copyright (C) 2013 INRIA. - * - * This file subject to the terms and conditions of the GNU Lesser General - * Public License. See the file LICENSE in the top level directory for more - * details. - * - * @ingroup destiny - * @{ - * @file tcp_hc.c - * @brief TCP HC - * @author Oliver Gesch - * @} - */ - - -#include -#include -#include - -#include "tcp_hc.h" -#include "socket.h" -#include "tcp.h" -#include "../sixlowpan/sixlowip.h" -#include "../net_help/net_help.h" - -#ifdef TCP_HC - -socket_internal_t *get_tcp_socket_by_context(ipv6_hdr_t *current_ipv6_header, - uint16_t current_context) -{ - socket_internal_t *temp_socket; - - for (int i = 1; i < MAX_SOCKETS + 1; i++) { - temp_socket = getSocket(i); - - if ((temp_socket != NULL) && - (ipv6_get_addr_match(&temp_socket->socket_values.foreign_address.sin6_addr, - ¤t_ipv6_header->srcaddr) == 128) && - (ipv6_get_addr_match(&temp_socket->socket_values.local_address.sin6_addr, - ¤t_ipv6_header->destaddr) == 128) && - (temp_socket->socket_values.tcp_control.tcp_context.context_id == - current_context)) { - return temp_socket; - } - } - - return NULL; -} - -void update_tcp_hc_context(bool incoming, socket_internal_t *current_socket, - tcp_hdr_t *current_tcp_packet) -{ - tcp_hc_context_t *current_context = - ¤t_socket->socket_values.tcp_control.tcp_context; - - if (incoming) { - current_context->ack_rcv = current_tcp_packet->ack_nr; - current_context->seq_rcv = current_tcp_packet->seq_nr; - current_context->wnd_rcv = current_tcp_packet->window; - } - else { - current_context->ack_snd = current_tcp_packet->ack_nr; - current_context->seq_snd = current_tcp_packet->seq_nr; - current_context->wnd_snd = current_tcp_packet->window; - } -} - -uint16_t compress_tcp_packet(socket_internal_t *current_socket, - uint8_t *current_tcp_packet, - ipv6_hdr_t *temp_ipv6_header, - uint8_t flags, - uint8_t payload_length) -{ - socket_t *current_tcp_socket = ¤t_socket->socket_values; - tcp_hc_context_t *tcp_context = ¤t_tcp_socket->tcp_control.tcp_context; - tcp_cb_t *tcp_cb = ¤t_tcp_socket->tcp_control; - tcp_hdr_t full_tcp_header; - uint16_t packet_size = 0; - - /* Connection establisment phase, use FULL_HEADER TCP */ - if (tcp_context->hc_type == FULL_HEADER) { - /* draft-aayadi-6lowpan-tcphc-01: 5.1 Full header TCP segment. - * Establishing Connection */ - - /* Move tcp packet 3 bytes to add padding and Context ID */ - memmove(current_tcp_packet + 3, current_tcp_packet, - ((((tcp_hdr_t *)current_tcp_packet)->dataOffset_reserved) * 4) + - payload_length); - - /* 1 padding byte with value 0x01 to introduce full header TCP_HC - * segment */ - memset(current_tcp_packet, 0x01, 1); - - /* Adding Context ID */ - uint16_t current_context = HTONS(tcp_context->context_id); - memcpy(current_tcp_packet + 1, ¤t_context, 2); - - /* Return correct header length (+3) */ - packet_size = ((((tcp_hdr_t *)(current_tcp_packet + 3))->dataOffset_reserved) * 4) + 3 + - payload_length; - - /* Update the tcp context fields */ - update_tcp_hc_context(false, current_socket, (tcp_hdr_t *)(current_tcp_packet + 3)); - - /* Convert TCP packet to network byte order */ - switch_tcp_packet_byte_order((tcp_hdr_t *)(current_tcp_packet + 3)); - - return packet_size; - } - /* Check for header compression type: COMPRESSED_HEADER */ - else if (tcp_context->hc_type == COMPRESSED_HEADER) { - /* draft-aayadi-6lowpan-tcphc-01: 5.1 Compressed header TCP segment. */ - - /* Temporary variable for TCP_HC_Header Bytes */ - uint16_t tcp_hc_header = 0x0000; - - /* Save TCP_Header to refresh TCP Context values after compressing the - * packet */ - memcpy(&full_tcp_header, current_tcp_packet, TCP_HDR_LEN); - - /* Temporary variable for storing TCP header beginning */ - uint8_t *tcp_packet_begin = current_tcp_packet; - - /* Position for first TCP header value, TCP_HC_Header and Context ID */ - current_tcp_packet += 4; - - /* Packet size value */ - packet_size += 4; - - /* 5.2. LOWPAN_TCPHC Format */ - - /* First 3 bits of TCP_HC_Header are not exactly specified. In this - * implementation they are (1|1|0) * for compressed headers and the - * CID is always 16 bits (1) */ - /* (1|1|0|1) = D */ - tcp_hc_header |= 0xD000; - - /*----------------------------------*/ - /*| Sequence number handling |*/ - /*----------------------------------*/ - if (full_tcp_header.seq_nr == tcp_context->seq_snd) { - /* Nothing to do, Seq = (0|0) */ - } - /* If the 24 most significant bits haven't changed from previous - * packet, don't transmit them */ - else if ((full_tcp_header.seq_nr & 0xFFFFFF00) == (tcp_context->seq_snd & - 0xFFFFFF00)) { - /* Seq = (0|1) */ - tcp_hc_header |= 0x0400; - - /* Copy first 8 less significant bits of sequence number into - * buffer */ - *current_tcp_packet = (uint8_t)(full_tcp_header.seq_nr & 0x000000FF); - current_tcp_packet += 1; - packet_size += 1; - } - /* If the 16 most significant bits haven't changed from previous packet, - * don't transmit them */ - else if ((full_tcp_header.seq_nr & 0xFFFF0000) == (tcp_context->seq_snd & 0xFFFF0000)) { - /* Seq = (1|0) */ - tcp_hc_header |= 0x0800; - - /* Copy first 16 less significant bits of sequence number into buffer */ - *((uint16_t *)current_tcp_packet) = - HTONS((uint16_t)(full_tcp_header.seq_nr & 0x0000FFFF)); - current_tcp_packet += 2; - packet_size += 2; - } - /* Sending uncompressed sequence number */ - else { - /* Seq = (1|1) */ - tcp_hc_header |= 0x0C00; - - /* Copy all bits of sequence number into buffer */ - uint32_t cur_seq_no = HTONL(full_tcp_header.seq_nr); - memcpy(current_tcp_packet, &cur_seq_no, 4); - current_tcp_packet += 4; - packet_size += 4; - } - - /*----------------------------------*/ - /*| Acknowledgment number handling |*/ - /*----------------------------------*/ - if ((IS_TCP_ACK(full_tcp_header.reserved_flags) && - (tcp_cb->tcp_context.ack_snd == full_tcp_header.ack_nr))) { - tcp_context->ack_snd = tcp_context->seq_rcv; - } - - if (full_tcp_header.ack_nr == tcp_context->ack_snd) { - /* Nothing to do, Ack = (0|0) */ - } - /* If the 24 most significant bits haven't changed from previous packet, - * don't transmit them */ - else if ((full_tcp_header.ack_nr & 0xFFFFFF00) == (tcp_context->ack_snd & - 0xFFFFFF00)) { - /* Ack = (0|1) */ - tcp_hc_header |= 0x0100; - - /* Copy first 8 less significant bits of acknowledgment number into - * buffer */ - *current_tcp_packet = (uint8_t)(full_tcp_header.ack_nr & 0x000000FF); - current_tcp_packet += 1; - packet_size += 1; - } - /* If the 16 most significant bits haven't changed from previous packet, - * don't transmit them */ - else if ((full_tcp_header.ack_nr & 0xFFFF0000) == (tcp_context->ack_snd & - 0xFFFF0000)) { - /* Ack = (1|0) */ - tcp_hc_header |= 0x0200; - - /* Copy first 16 less significant bits of acknowledgment number - * into buffer */ - *((uint16_t *)current_tcp_packet) = - HTONS((uint16_t)(full_tcp_header.ack_nr & 0x0000FFFF)); - current_tcp_packet += 2; - packet_size += 2; - } - /* Sending uncompressed acknowledgment number */ - else { - /* Ack = (1|1) */ - tcp_hc_header |= 0x0300; - - /* Copy all bits of acknowledgment number into buffer */ - uint32_t cur_ack_nr = HTONL(full_tcp_header.ack_nr); - memcpy(current_tcp_packet, &cur_ack_nr, 4); - current_tcp_packet += 4; - packet_size += 4; - } - - /*----------------------------------*/ - /*| Window handling |*/ - /*----------------------------------*/ - if (full_tcp_header.window == tcp_context->wnd_snd) { - /* Nothing to do, Wnd = (0|0) */ - } - /* If the 8 most significant bits haven't changed from previous packet, - * don't transmit them */ - else if ((full_tcp_header.window & 0xFF00) == (tcp_context->wnd_snd & 0xFF00)) { - /* Wnd = (0|1) */ - tcp_hc_header |= 0x0040; - - /* Copy first 8 less significant bits of window size into buffer */ - *current_tcp_packet = (uint8_t)(full_tcp_header.window & 0x00FF); - current_tcp_packet += 1; - packet_size += 1; - } - /* If the 8 less significant bits haven't changed from previous packet, - * don't transmit them */ - else if ((full_tcp_header.window & 0x00FF) == (tcp_context->wnd_snd & - 0x00FF)) { - /* Wnd = (1|0) */ - tcp_hc_header |= 0x0080; - - /* Copy first 8 most significant bits of window size into buffer */ - *current_tcp_packet = (uint8_t)(full_tcp_header.window & 0xFF00); - current_tcp_packet += 1; - packet_size += 1; - } - /* Sending uncompressed window */ - else { - /* Wnd = (1|1) */ - tcp_hc_header |= 0x00C0; - - /* Copy all bits of window size into buffer */ - uint16_t cur_window = HTONS(full_tcp_header.window); - memcpy(current_tcp_packet, &cur_window, 2); - current_tcp_packet += 2; - packet_size += 2; - } - - /* FIN flag */ - if (IS_TCP_FIN(full_tcp_header.reserved_flags)) { - /* F = (1) */ - tcp_hc_header |= 0x0008; - } - - /* Copy checksum into buffer */ - uint16_t cur_chk_sum = HTONS(full_tcp_header.checksum); - memcpy(current_tcp_packet, &cur_chk_sum, 2); - current_tcp_packet += 2; - packet_size += 2; - - /* Copy TCP_HC Bytes into buffer */ - uint16_t cur_tcp_hc_header = HTONS(tcp_hc_header); - memcpy(tcp_packet_begin, &cur_tcp_hc_header, 2); - - /* Copy TCP_HC Context ID into buffer */ - uint16_t cur_context_id = HTONS(tcp_context->context_id); - memcpy(tcp_packet_begin + 2, &cur_context_id, 2); - - /* Move payload to end of tcp header */ - memmove(current_tcp_packet, tcp_packet_begin + TCP_HDR_LEN, - payload_length); - - /* Adding TCP payload length to TCP_HC header length */ - packet_size += payload_length; - - update_tcp_hc_context(false, current_socket, &full_tcp_header); - - return packet_size; - } - /* Check for header compression type: MOSTLY_COMPRESSED_HEADER */ - else if (tcp_context->hc_type == MOSTLY_COMPRESSED_HEADER) { - /* draft-aayadi-6lowpan-tcphc-01: 5.1 Compressed header TCP segment. */ - - /* Temporary variable for TCP_HC_Header Bytes */ - uint16_t tcp_hc_header = 0x0000; - - /* Save TCP_Header to refresh TCP Context values after compressing the - * packet */ - memcpy(&full_tcp_header, current_tcp_packet, TCP_HDR_LEN); - - /* Temporary variable for storing TCP header beginning */ - uint8_t *tcp_packet_begin = current_tcp_packet; - - /* Position for first TCP header value, TCP_HC_Header and Context ID */ - current_tcp_packet += 4; - - /* Packet size value */ - packet_size += 4; - - /* 5.2. LOWPAN_TCPHC Format */ - - /* First 3 bits of TCP_HC_Header are not exactly specified. In this - * implementation they are (1|0|0) for mostly compressed headers and - * the CID is always 16 bits (1) */ - /* (1|0|0|1) = 9 */ - tcp_hc_header |= 0x9000; - - /*----------------------------------*/ - /*| Sequence number handling |*/ - /*----------------------------------*/ - /* Sending uncompressed sequence number */ - /* Seq = (1|1) */ - tcp_hc_header |= 0x0C00; - - /* Copy all bits of sequence number into buffer */ - uint32_t cur_seq_no = HTONL(full_tcp_header.seq_nr); - memcpy(current_tcp_packet, &cur_seq_no, 4); - current_tcp_packet += 4; - packet_size += 4; - - /*----------------------------------*/ - /*| Acknowledgment number handling |*/ - /*----------------------------------*/ - /* Ack = (1|1) */ - tcp_hc_header |= 0x0300; - - /* Copy all bits of acknowledgment number into buffer */ - uint32_t cur_ack_nr = HTONL(full_tcp_header.ack_nr); - memcpy(current_tcp_packet, &cur_ack_nr, 4); - current_tcp_packet += 4; - packet_size += 4; - - /*----------------------------------*/ - /*| Window handling |*/ - /*----------------------------------*/ - /* Wnd = (1|1) */ - tcp_hc_header |= 0x00C0; - - /* Copy all bits of window size into buffer */ - uint16_t cur_window = HTONS(full_tcp_header.window); - memcpy(current_tcp_packet, &cur_window, 2); - current_tcp_packet += 2; - packet_size += 2; - - /* FIN flag */ - if (IS_TCP_FIN(full_tcp_header.reserved_flags)) { - /* F = (1) */ - tcp_hc_header |= 0x0008; - } - - /* Copy checksum into buffer */ - uint16_t cur_chk_sum = HTONS(full_tcp_header.checksum); - memcpy(current_tcp_packet, &cur_chk_sum, 2); - current_tcp_packet += 2; - packet_size += 2; - - /* Copy TCP_HC Bytes into buffer */ - uint16_t cur_tcp_hc_header = HTONS(tcp_hc_header); - memcpy(tcp_packet_begin, &cur_tcp_hc_header, 2); - - /* Copy TCP_HC Context ID into buffer */ - uint16_t cur_context_id = HTONS(tcp_context->context_id); - memcpy(tcp_packet_begin + 2, &cur_context_id, 2); - - /* Move payload to end of tcp header */ - memmove(current_tcp_packet, tcp_packet_begin + TCP_HDR_LEN, - payload_length); - - /* Adding TCP payload length to TCP_HC header length */ - packet_size += payload_length; - - update_tcp_hc_context(false, current_socket, &full_tcp_header); - return packet_size; - } - - return 0; -} - -socket_internal_t *decompress_tcp_packet(ipv6_hdr_t *temp_ipv6_header) -{ - uint8_t *packet_buffer = ((uint8_t *)temp_ipv6_header) + IPV6_HDR_LEN; - uint16_t tcp_hc_header; - socket_internal_t *current_socket = NULL; - uint16_t packet_size = 0; - - /* Full header TCP segment */ - if (*(((uint8_t *)temp_ipv6_header) + IPV6_HDR_LEN) == 0x01) { - switch_tcp_packet_byte_order(((tcp_hdr_t *)(((uint8_t *)temp_ipv6_header) + - IPV6_HDR_LEN + 3))); - current_socket = get_tcp_socket(temp_ipv6_header, - ((tcp_hdr_t *)(((uint8_t *)temp_ipv6_header) + - IPV6_HDR_LEN + 3))); - - if (current_socket != NULL) { - if (current_socket->socket_values.tcp_control.state == LISTEN) { - memcpy(¤t_socket->socket_values.tcp_control.tcp_context.context_id, - ((uint8_t *)temp_ipv6_header) + IPV6_HDR_LEN + 1, 2); - current_socket->socket_values.tcp_control.tcp_context.context_id = - NTOHS(current_socket->socket_values.tcp_control.tcp_context.context_id); - } - - memmove(((uint8_t *)temp_ipv6_header) + IPV6_HDR_LEN, - (((uint8_t *)temp_ipv6_header) + IPV6_HDR_LEN + 3), - temp_ipv6_header->length - 3); - temp_ipv6_header->length -= 3; - return current_socket; - } - else { - printf("Socket Null!\n"); - /* Found no matching socket for this packet -> Drop it */ - return NULL; - } - } - /* Compressed header TCP segment */ - else { - /* Temporary TCP Header */ - tcp_hdr_t full_tcp_header; - memset(&full_tcp_header, 0, sizeof(tcp_hdr_t)); - - /* Current context ID */ - uint16_t current_context; - memcpy(¤t_context, (packet_buffer + 2), 2); - current_context = NTOHS(current_context); - - /* Copy TCP_HC header into local variable - * (1,0,0,1|SEQ,SEQ,0)(1,0,0,1|0,0,0,0) */ - memcpy(&tcp_hc_header, packet_buffer, 2); - tcp_hc_header = NTOHS(tcp_hc_header); - - uint8_t header_type = UNDEFINED; - - if (BITSET(tcp_hc_header, 15) && !BITSET(tcp_hc_header, 14) && - !BITSET(tcp_hc_header, 13)) { - header_type = MOSTLY_COMPRESSED_HEADER; - } - else if (BITSET(tcp_hc_header, 15) && BITSET(tcp_hc_header, 14) && - !BITSET(tcp_hc_header, 13)) { - header_type = COMPRESSED_HEADER; - } - - /* Setting pointer to first tcp_hc field */ - packet_buffer += 4; - packet_size += 4; - - /* Current socket */ - socket_internal_t *current_socket = - get_tcp_socket_by_context(temp_ipv6_header, current_context); - - if (current_socket == NULL) { - printf("Current Socket == NULL!\n"); - return NULL; - } - - /* Current TCP Context values */ - tcp_hc_context_t *current_tcp_context = - ¤t_socket->socket_values.tcp_control.tcp_context; - - /*----------------------------------*/ - /*| Sequence number handling |*/ - /*----------------------------------*/ - if (!BITSET(tcp_hc_header, 11) && !BITSET(tcp_hc_header, 10)) { - /* Seq = (0|0), sequence number didn't change, copy old value */ - memcpy(&full_tcp_header.seq_nr, ¤t_tcp_context->seq_rcv, 4); - } - /* The 24 most significant bits haven't changed from previous packet */ - else if (!BITSET(tcp_hc_header, 11) && BITSET(tcp_hc_header, 10)) { - /* Seq = (0|1), copy 1 byte of tcp_hc packet and 3 bytes from - * previous packet */ - full_tcp_header.seq_nr |= *packet_buffer; - full_tcp_header.seq_nr |= ((current_tcp_context->seq_rcv) & - 0xFFFFFF00); - packet_buffer += 1; - packet_size += 1; - } - /* If the 16 most significant bits haven't changed from previous packet */ - else if (BITSET(tcp_hc_header, 11) && !BITSET(tcp_hc_header, 10)) { - /* Seq = (1|0), copy 2 bytes of tcp_hc packet and 2 bytes from - * previous packet */ - full_tcp_header.seq_nr |= NTOHS(*((uint16_t *)packet_buffer)); - full_tcp_header.seq_nr |= ((current_tcp_context->seq_rcv) & 0xFFFF0000); - packet_buffer += 2; - packet_size += 2; - } - /* Sending uncompressed sequence number */ - else { - /* Seq = (1|1), copy 4 bytes of tcp_hc packet */ - memcpy(&full_tcp_header.seq_nr, packet_buffer, 4); - full_tcp_header.seq_nr = NTOHL(full_tcp_header.seq_nr); - packet_buffer += 4; - packet_size += 4; - } - - /*----------------------------------*/ - /*| Acknowledgment number handling |*/ - /*----------------------------------*/ - if (!BITSET(tcp_hc_header, 9) && !BITSET(tcp_hc_header, 8)) { - /* Ack = (0|0), acknowledgment number didn't change, copy old value */ - memcpy(&full_tcp_header.ack_nr, ¤t_tcp_context->ack_rcv, 4); - } - /* The 24 most significant bits haven't changed from previous packet */ - else if (!BITSET(tcp_hc_header, 9) && BITSET(tcp_hc_header, 8)) { - /* Ack = (0|1), copy 1 byte of tcp_hc packet and 3 bytes from - * previous packet */ - full_tcp_header.ack_nr |= *packet_buffer; - full_tcp_header.ack_nr |= ((current_tcp_context->ack_rcv) & 0xFFFFFF00); - packet_buffer += 1; - packet_size += 1; - SET_TCP_ACK(full_tcp_header.reserved_flags); - } - /* If the 16 most significant bits haven't changed from previous packet */ - else if (BITSET(tcp_hc_header, 9) && !BITSET(tcp_hc_header, 8)) { - /* Ack = (1|0), copy 2 bytes of tcp_hc packet and 2 bytes from - * previous packet */ - full_tcp_header.ack_nr |= NTOHS(*((uint16_t *)packet_buffer)); - full_tcp_header.ack_nr |= ((current_tcp_context->ack_rcv) & 0xFFFF0000); - packet_buffer += 2; - packet_size += 2; - SET_TCP_ACK(full_tcp_header.reserved_flags); - } - /* Sending uncompressed acknowledgment number */ - else { - /* Ack = (1|1), copy 4 bytes of tcp_hc packet */ - memcpy(&full_tcp_header.ack_nr, packet_buffer, 4); - full_tcp_header.ack_nr = NTOHL(full_tcp_header.ack_nr); - packet_buffer += 4; - packet_size += 4; - - if (header_type == COMPRESSED_HEADER) { - SET_TCP_ACK(full_tcp_header.reserved_flags); - } - } - - /*----------------------------------*/ - /*| Window handling |*/ - /*----------------------------------*/ - if (!BITSET(tcp_hc_header, 7) && !BITSET(tcp_hc_header, 6)) { - /* Wnd = (0|0), copy old value */ - memcpy(&full_tcp_header.window, ¤t_tcp_context->wnd_rcv, 2); - } - /* The 8 most significant bits haven't changed from previous packet */ - else if (!BITSET(tcp_hc_header, 7) && BITSET(tcp_hc_header, 6)) { - /* Wnd = (0|1), copy 1 byte of tcp_hc packet and 1 byte from - * previous packet */ - full_tcp_header.window |= *packet_buffer; - full_tcp_header.window |= ((current_tcp_context->wnd_rcv) & 0xFF00); - packet_buffer += 1; - packet_size += 1; - } - /* If the 8 less significant bits haven't changed from previous packet */ - else if (BITSET(tcp_hc_header, 7) && !BITSET(tcp_hc_header, 6)) { - /* Wnd = (1|0), copy 1 byte of tcp_hc packet and 1 byte from previous packet */ - full_tcp_header.window |= ((*((uint16_t *)packet_buffer)) & 0xFF00); - full_tcp_header.window |= ((current_tcp_context->wnd_rcv) & 0x00FF); - packet_buffer += 1; - packet_size += 1; - } - /* Sending uncompressed window size */ - else { - /* Wnd = (1|1), copy 2 bytes of tcp_hc packet */ - memcpy(&full_tcp_header.window, packet_buffer, 2); - full_tcp_header.window = NTOHS(full_tcp_header.window); - packet_buffer += 2; - packet_size += 2; - } - - /* FIN flag */ - if (BITSET(tcp_hc_header, 3)) { - /* F = (1) */ - if (IS_TCP_ACK(full_tcp_header.reserved_flags)) { - SET_TCP_FIN_ACK(full_tcp_header.reserved_flags); - } - else { - SET_TCP_FIN(full_tcp_header.reserved_flags); - } - } - - /* Copy checksum into into tcp header */ - memcpy(&full_tcp_header.checksum, packet_buffer, 2); - full_tcp_header.checksum = NTOHS(full_tcp_header.checksum); - packet_buffer += 2; - packet_size += 2; - - /* Copy dest. and src. port into tcp header */ - memcpy(&full_tcp_header.dst_port, - ¤t_socket->socket_values.local_address.sin6_port, 2); - memcpy(&full_tcp_header.src_port, - ¤t_socket->socket_values.foreign_address.sin6_port, 2); - - /* Ordinary TCP header length */ - full_tcp_header.dataOffset_reserved = TCP_HDR_LEN / 4; - - /* Move payload to end of tcp header */ - memmove(((uint8_t *)temp_ipv6_header) + IPV6_HDR_LEN + TCP_HDR_LEN, - packet_buffer, temp_ipv6_header->length - packet_size); - - /* Copy TCP uncompressed header in front of payload */ - memcpy(((uint8_t *)temp_ipv6_header) + IPV6_HDR_LEN, &full_tcp_header, - TCP_HDR_LEN); - - /* Set IPV6 header length */ - temp_ipv6_header->length = temp_ipv6_header->length - packet_size + - TCP_HDR_LEN; - return current_socket; - } -} - -#endif +/** + * Destiny TCP header compression + * + * Copyright (C) 2013 INRIA. + * + * This file subject to the terms and conditions of the GNU Lesser General + * Public License. See the file LICENSE in the top level directory for more + * details. + * + * @ingroup destiny + * @{ + * @file tcp_hc.c + * @brief TCP HC + * @author Oliver Gesch + * @} + */ + + +#include +#include +#include + +#include "tcp_hc.h" +#include "socket.h" +#include "tcp.h" +#include "../sixlowpan/sixlowip.h" +#include "../net_help/net_help.h" + +#ifdef TCP_HC + +socket_internal_t *get_tcp_socket_by_context(ipv6_hdr_t *current_ipv6_header, + uint16_t current_context) +{ + socket_internal_t *temp_socket; + + for (int i = 1; i < MAX_SOCKETS + 1; i++) { + temp_socket = getSocket(i); + + if ((temp_socket != NULL) && + (ipv6_get_addr_match(&temp_socket->socket_values.foreign_address.sin6_addr, + ¤t_ipv6_header->srcaddr) == 128) && + (ipv6_get_addr_match(&temp_socket->socket_values.local_address.sin6_addr, + ¤t_ipv6_header->destaddr) == 128) && + (temp_socket->socket_values.tcp_control.tcp_context.context_id == + current_context)) { + return temp_socket; + } + } + + return NULL; +} + +void update_tcp_hc_context(bool incoming, socket_internal_t *current_socket, + tcp_hdr_t *current_tcp_packet) +{ + tcp_hc_context_t *current_context = + ¤t_socket->socket_values.tcp_control.tcp_context; + + if (incoming) { + current_context->ack_rcv = current_tcp_packet->ack_nr; + current_context->seq_rcv = current_tcp_packet->seq_nr; + current_context->wnd_rcv = current_tcp_packet->window; + } + else { + current_context->ack_snd = current_tcp_packet->ack_nr; + current_context->seq_snd = current_tcp_packet->seq_nr; + current_context->wnd_snd = current_tcp_packet->window; + } +} + +uint16_t compress_tcp_packet(socket_internal_t *current_socket, + uint8_t *current_tcp_packet, + ipv6_hdr_t *temp_ipv6_header, + uint8_t flags, + uint8_t payload_length) +{ + socket_t *current_tcp_socket = ¤t_socket->socket_values; + tcp_hc_context_t *tcp_context = ¤t_tcp_socket->tcp_control.tcp_context; + tcp_cb_t *tcp_cb = ¤t_tcp_socket->tcp_control; + tcp_hdr_t full_tcp_header; + uint16_t packet_size = 0; + + /* Connection establisment phase, use FULL_HEADER TCP */ + if (tcp_context->hc_type == FULL_HEADER) { + /* draft-aayadi-6lowpan-tcphc-01: 5.1 Full header TCP segment. + * Establishing Connection */ + + /* Move tcp packet 3 bytes to add padding and Context ID */ + memmove(current_tcp_packet + 3, current_tcp_packet, + ((((tcp_hdr_t *)current_tcp_packet)->dataOffset_reserved) * 4) + + payload_length); + + /* 1 padding byte with value 0x01 to introduce full header TCP_HC + * segment */ + memset(current_tcp_packet, 0x01, 1); + + /* Adding Context ID */ + uint16_t current_context = HTONS(tcp_context->context_id); + memcpy(current_tcp_packet + 1, ¤t_context, 2); + + /* Return correct header length (+3) */ + packet_size = ((((tcp_hdr_t *)(current_tcp_packet + 3))->dataOffset_reserved) * 4) + 3 + + payload_length; + + /* Update the tcp context fields */ + update_tcp_hc_context(false, current_socket, (tcp_hdr_t *)(current_tcp_packet + 3)); + + /* Convert TCP packet to network byte order */ + switch_tcp_packet_byte_order((tcp_hdr_t *)(current_tcp_packet + 3)); + + return packet_size; + } + /* Check for header compression type: COMPRESSED_HEADER */ + else if (tcp_context->hc_type == COMPRESSED_HEADER) { + /* draft-aayadi-6lowpan-tcphc-01: 5.1 Compressed header TCP segment. */ + + /* Temporary variable for TCP_HC_Header Bytes */ + uint16_t tcp_hc_header = 0x0000; + + /* Save TCP_Header to refresh TCP Context values after compressing the + * packet */ + memcpy(&full_tcp_header, current_tcp_packet, TCP_HDR_LEN); + + /* Temporary variable for storing TCP header beginning */ + uint8_t *tcp_packet_begin = current_tcp_packet; + + /* Position for first TCP header value, TCP_HC_Header and Context ID */ + current_tcp_packet += 4; + + /* Packet size value */ + packet_size += 4; + + /* 5.2. LOWPAN_TCPHC Format */ + + /* First 3 bits of TCP_HC_Header are not exactly specified. In this + * implementation they are (1|1|0) * for compressed headers and the + * CID is always 16 bits (1) */ + /* (1|1|0|1) = D */ + tcp_hc_header |= 0xD000; + + /*----------------------------------*/ + /*| Sequence number handling |*/ + /*----------------------------------*/ + if (full_tcp_header.seq_nr == tcp_context->seq_snd) { + /* Nothing to do, Seq = (0|0) */ + } + /* If the 24 most significant bits haven't changed from previous + * packet, don't transmit them */ + else if ((full_tcp_header.seq_nr & 0xFFFFFF00) == (tcp_context->seq_snd & + 0xFFFFFF00)) { + /* Seq = (0|1) */ + tcp_hc_header |= 0x0400; + + /* Copy first 8 less significant bits of sequence number into + * buffer */ + *current_tcp_packet = (uint8_t)(full_tcp_header.seq_nr & 0x000000FF); + current_tcp_packet += 1; + packet_size += 1; + } + /* If the 16 most significant bits haven't changed from previous packet, + * don't transmit them */ + else if ((full_tcp_header.seq_nr & 0xFFFF0000) == (tcp_context->seq_snd & 0xFFFF0000)) { + /* Seq = (1|0) */ + tcp_hc_header |= 0x0800; + + /* Copy first 16 less significant bits of sequence number into buffer */ + *((uint16_t *)current_tcp_packet) = + HTONS((uint16_t)(full_tcp_header.seq_nr & 0x0000FFFF)); + current_tcp_packet += 2; + packet_size += 2; + } + /* Sending uncompressed sequence number */ + else { + /* Seq = (1|1) */ + tcp_hc_header |= 0x0C00; + + /* Copy all bits of sequence number into buffer */ + uint32_t cur_seq_no = HTONL(full_tcp_header.seq_nr); + memcpy(current_tcp_packet, &cur_seq_no, 4); + current_tcp_packet += 4; + packet_size += 4; + } + + /*----------------------------------*/ + /*| Acknowledgment number handling |*/ + /*----------------------------------*/ + if ((IS_TCP_ACK(full_tcp_header.reserved_flags) && + (tcp_cb->tcp_context.ack_snd == full_tcp_header.ack_nr))) { + tcp_context->ack_snd = tcp_context->seq_rcv; + } + + if (full_tcp_header.ack_nr == tcp_context->ack_snd) { + /* Nothing to do, Ack = (0|0) */ + } + /* If the 24 most significant bits haven't changed from previous packet, + * don't transmit them */ + else if ((full_tcp_header.ack_nr & 0xFFFFFF00) == (tcp_context->ack_snd & + 0xFFFFFF00)) { + /* Ack = (0|1) */ + tcp_hc_header |= 0x0100; + + /* Copy first 8 less significant bits of acknowledgment number into + * buffer */ + *current_tcp_packet = (uint8_t)(full_tcp_header.ack_nr & 0x000000FF); + current_tcp_packet += 1; + packet_size += 1; + } + /* If the 16 most significant bits haven't changed from previous packet, + * don't transmit them */ + else if ((full_tcp_header.ack_nr & 0xFFFF0000) == (tcp_context->ack_snd & + 0xFFFF0000)) { + /* Ack = (1|0) */ + tcp_hc_header |= 0x0200; + + /* Copy first 16 less significant bits of acknowledgment number + * into buffer */ + *((uint16_t *)current_tcp_packet) = + HTONS((uint16_t)(full_tcp_header.ack_nr & 0x0000FFFF)); + current_tcp_packet += 2; + packet_size += 2; + } + /* Sending uncompressed acknowledgment number */ + else { + /* Ack = (1|1) */ + tcp_hc_header |= 0x0300; + + /* Copy all bits of acknowledgment number into buffer */ + uint32_t cur_ack_nr = HTONL(full_tcp_header.ack_nr); + memcpy(current_tcp_packet, &cur_ack_nr, 4); + current_tcp_packet += 4; + packet_size += 4; + } + + /*----------------------------------*/ + /*| Window handling |*/ + /*----------------------------------*/ + if (full_tcp_header.window == tcp_context->wnd_snd) { + /* Nothing to do, Wnd = (0|0) */ + } + /* If the 8 most significant bits haven't changed from previous packet, + * don't transmit them */ + else if ((full_tcp_header.window & 0xFF00) == (tcp_context->wnd_snd & 0xFF00)) { + /* Wnd = (0|1) */ + tcp_hc_header |= 0x0040; + + /* Copy first 8 less significant bits of window size into buffer */ + *current_tcp_packet = (uint8_t)(full_tcp_header.window & 0x00FF); + current_tcp_packet += 1; + packet_size += 1; + } + /* If the 8 less significant bits haven't changed from previous packet, + * don't transmit them */ + else if ((full_tcp_header.window & 0x00FF) == (tcp_context->wnd_snd & + 0x00FF)) { + /* Wnd = (1|0) */ + tcp_hc_header |= 0x0080; + + /* Copy first 8 most significant bits of window size into buffer */ + *current_tcp_packet = (uint8_t)(full_tcp_header.window & 0xFF00); + current_tcp_packet += 1; + packet_size += 1; + } + /* Sending uncompressed window */ + else { + /* Wnd = (1|1) */ + tcp_hc_header |= 0x00C0; + + /* Copy all bits of window size into buffer */ + uint16_t cur_window = HTONS(full_tcp_header.window); + memcpy(current_tcp_packet, &cur_window, 2); + current_tcp_packet += 2; + packet_size += 2; + } + + /* FIN flag */ + if (IS_TCP_FIN(full_tcp_header.reserved_flags)) { + /* F = (1) */ + tcp_hc_header |= 0x0008; + } + + /* Copy checksum into buffer */ + uint16_t cur_chk_sum = HTONS(full_tcp_header.checksum); + memcpy(current_tcp_packet, &cur_chk_sum, 2); + current_tcp_packet += 2; + packet_size += 2; + + /* Copy TCP_HC Bytes into buffer */ + uint16_t cur_tcp_hc_header = HTONS(tcp_hc_header); + memcpy(tcp_packet_begin, &cur_tcp_hc_header, 2); + + /* Copy TCP_HC Context ID into buffer */ + uint16_t cur_context_id = HTONS(tcp_context->context_id); + memcpy(tcp_packet_begin + 2, &cur_context_id, 2); + + /* Move payload to end of tcp header */ + memmove(current_tcp_packet, tcp_packet_begin + TCP_HDR_LEN, + payload_length); + + /* Adding TCP payload length to TCP_HC header length */ + packet_size += payload_length; + + update_tcp_hc_context(false, current_socket, &full_tcp_header); + + return packet_size; + } + /* Check for header compression type: MOSTLY_COMPRESSED_HEADER */ + else if (tcp_context->hc_type == MOSTLY_COMPRESSED_HEADER) { + /* draft-aayadi-6lowpan-tcphc-01: 5.1 Compressed header TCP segment. */ + + /* Temporary variable for TCP_HC_Header Bytes */ + uint16_t tcp_hc_header = 0x0000; + + /* Save TCP_Header to refresh TCP Context values after compressing the + * packet */ + memcpy(&full_tcp_header, current_tcp_packet, TCP_HDR_LEN); + + /* Temporary variable for storing TCP header beginning */ + uint8_t *tcp_packet_begin = current_tcp_packet; + + /* Position for first TCP header value, TCP_HC_Header and Context ID */ + current_tcp_packet += 4; + + /* Packet size value */ + packet_size += 4; + + /* 5.2. LOWPAN_TCPHC Format */ + + /* First 3 bits of TCP_HC_Header are not exactly specified. In this + * implementation they are (1|0|0) for mostly compressed headers and + * the CID is always 16 bits (1) */ + /* (1|0|0|1) = 9 */ + tcp_hc_header |= 0x9000; + + /*----------------------------------*/ + /*| Sequence number handling |*/ + /*----------------------------------*/ + /* Sending uncompressed sequence number */ + /* Seq = (1|1) */ + tcp_hc_header |= 0x0C00; + + /* Copy all bits of sequence number into buffer */ + uint32_t cur_seq_no = HTONL(full_tcp_header.seq_nr); + memcpy(current_tcp_packet, &cur_seq_no, 4); + current_tcp_packet += 4; + packet_size += 4; + + /*----------------------------------*/ + /*| Acknowledgment number handling |*/ + /*----------------------------------*/ + /* Ack = (1|1) */ + tcp_hc_header |= 0x0300; + + /* Copy all bits of acknowledgment number into buffer */ + uint32_t cur_ack_nr = HTONL(full_tcp_header.ack_nr); + memcpy(current_tcp_packet, &cur_ack_nr, 4); + current_tcp_packet += 4; + packet_size += 4; + + /*----------------------------------*/ + /*| Window handling |*/ + /*----------------------------------*/ + /* Wnd = (1|1) */ + tcp_hc_header |= 0x00C0; + + /* Copy all bits of window size into buffer */ + uint16_t cur_window = HTONS(full_tcp_header.window); + memcpy(current_tcp_packet, &cur_window, 2); + current_tcp_packet += 2; + packet_size += 2; + + /* FIN flag */ + if (IS_TCP_FIN(full_tcp_header.reserved_flags)) { + /* F = (1) */ + tcp_hc_header |= 0x0008; + } + + /* Copy checksum into buffer */ + uint16_t cur_chk_sum = HTONS(full_tcp_header.checksum); + memcpy(current_tcp_packet, &cur_chk_sum, 2); + current_tcp_packet += 2; + packet_size += 2; + + /* Copy TCP_HC Bytes into buffer */ + uint16_t cur_tcp_hc_header = HTONS(tcp_hc_header); + memcpy(tcp_packet_begin, &cur_tcp_hc_header, 2); + + /* Copy TCP_HC Context ID into buffer */ + uint16_t cur_context_id = HTONS(tcp_context->context_id); + memcpy(tcp_packet_begin + 2, &cur_context_id, 2); + + /* Move payload to end of tcp header */ + memmove(current_tcp_packet, tcp_packet_begin + TCP_HDR_LEN, + payload_length); + + /* Adding TCP payload length to TCP_HC header length */ + packet_size += payload_length; + + update_tcp_hc_context(false, current_socket, &full_tcp_header); + return packet_size; + } + + return 0; +} + +socket_internal_t *decompress_tcp_packet(ipv6_hdr_t *temp_ipv6_header) +{ + uint8_t *packet_buffer = ((uint8_t *)temp_ipv6_header) + IPV6_HDR_LEN; + uint16_t tcp_hc_header; + socket_internal_t *current_socket = NULL; + uint16_t packet_size = 0; + + /* Full header TCP segment */ + if (*(((uint8_t *)temp_ipv6_header) + IPV6_HDR_LEN) == 0x01) { + switch_tcp_packet_byte_order(((tcp_hdr_t *)(((uint8_t *)temp_ipv6_header) + + IPV6_HDR_LEN + 3))); + current_socket = get_tcp_socket(temp_ipv6_header, + ((tcp_hdr_t *)(((uint8_t *)temp_ipv6_header) + + IPV6_HDR_LEN + 3))); + + if (current_socket != NULL) { + if (current_socket->socket_values.tcp_control.state == LISTEN) { + memcpy(¤t_socket->socket_values.tcp_control.tcp_context.context_id, + ((uint8_t *)temp_ipv6_header) + IPV6_HDR_LEN + 1, 2); + current_socket->socket_values.tcp_control.tcp_context.context_id = + NTOHS(current_socket->socket_values.tcp_control.tcp_context.context_id); + } + + memmove(((uint8_t *)temp_ipv6_header) + IPV6_HDR_LEN, + (((uint8_t *)temp_ipv6_header) + IPV6_HDR_LEN + 3), + temp_ipv6_header->length - 3); + temp_ipv6_header->length -= 3; + return current_socket; + } + else { + printf("Socket Null!\n"); + /* Found no matching socket for this packet -> Drop it */ + return NULL; + } + } + /* Compressed header TCP segment */ + else { + /* Temporary TCP Header */ + tcp_hdr_t full_tcp_header; + memset(&full_tcp_header, 0, sizeof(tcp_hdr_t)); + + /* Current context ID */ + uint16_t current_context; + memcpy(¤t_context, (packet_buffer + 2), 2); + current_context = NTOHS(current_context); + + /* Copy TCP_HC header into local variable + * (1,0,0,1|SEQ,SEQ,0)(1,0,0,1|0,0,0,0) */ + memcpy(&tcp_hc_header, packet_buffer, 2); + tcp_hc_header = NTOHS(tcp_hc_header); + + uint8_t header_type = UNDEFINED; + + if (BITSET(tcp_hc_header, 15) && !BITSET(tcp_hc_header, 14) && + !BITSET(tcp_hc_header, 13)) { + header_type = MOSTLY_COMPRESSED_HEADER; + } + else if (BITSET(tcp_hc_header, 15) && BITSET(tcp_hc_header, 14) && + !BITSET(tcp_hc_header, 13)) { + header_type = COMPRESSED_HEADER; + } + + /* Setting pointer to first tcp_hc field */ + packet_buffer += 4; + packet_size += 4; + + /* Current socket */ + socket_internal_t *current_socket = + get_tcp_socket_by_context(temp_ipv6_header, current_context); + + if (current_socket == NULL) { + printf("Current Socket == NULL!\n"); + return NULL; + } + + /* Current TCP Context values */ + tcp_hc_context_t *current_tcp_context = + ¤t_socket->socket_values.tcp_control.tcp_context; + + /*----------------------------------*/ + /*| Sequence number handling |*/ + /*----------------------------------*/ + if (!BITSET(tcp_hc_header, 11) && !BITSET(tcp_hc_header, 10)) { + /* Seq = (0|0), sequence number didn't change, copy old value */ + memcpy(&full_tcp_header.seq_nr, ¤t_tcp_context->seq_rcv, 4); + } + /* The 24 most significant bits haven't changed from previous packet */ + else if (!BITSET(tcp_hc_header, 11) && BITSET(tcp_hc_header, 10)) { + /* Seq = (0|1), copy 1 byte of tcp_hc packet and 3 bytes from + * previous packet */ + full_tcp_header.seq_nr |= *packet_buffer; + full_tcp_header.seq_nr |= ((current_tcp_context->seq_rcv) & + 0xFFFFFF00); + packet_buffer += 1; + packet_size += 1; + } + /* If the 16 most significant bits haven't changed from previous packet */ + else if (BITSET(tcp_hc_header, 11) && !BITSET(tcp_hc_header, 10)) { + /* Seq = (1|0), copy 2 bytes of tcp_hc packet and 2 bytes from + * previous packet */ + full_tcp_header.seq_nr |= NTOHS(*((uint16_t *)packet_buffer)); + full_tcp_header.seq_nr |= ((current_tcp_context->seq_rcv) & 0xFFFF0000); + packet_buffer += 2; + packet_size += 2; + } + /* Sending uncompressed sequence number */ + else { + /* Seq = (1|1), copy 4 bytes of tcp_hc packet */ + memcpy(&full_tcp_header.seq_nr, packet_buffer, 4); + full_tcp_header.seq_nr = NTOHL(full_tcp_header.seq_nr); + packet_buffer += 4; + packet_size += 4; + } + + /*----------------------------------*/ + /*| Acknowledgment number handling |*/ + /*----------------------------------*/ + if (!BITSET(tcp_hc_header, 9) && !BITSET(tcp_hc_header, 8)) { + /* Ack = (0|0), acknowledgment number didn't change, copy old value */ + memcpy(&full_tcp_header.ack_nr, ¤t_tcp_context->ack_rcv, 4); + } + /* The 24 most significant bits haven't changed from previous packet */ + else if (!BITSET(tcp_hc_header, 9) && BITSET(tcp_hc_header, 8)) { + /* Ack = (0|1), copy 1 byte of tcp_hc packet and 3 bytes from + * previous packet */ + full_tcp_header.ack_nr |= *packet_buffer; + full_tcp_header.ack_nr |= ((current_tcp_context->ack_rcv) & 0xFFFFFF00); + packet_buffer += 1; + packet_size += 1; + SET_TCP_ACK(full_tcp_header.reserved_flags); + } + /* If the 16 most significant bits haven't changed from previous packet */ + else if (BITSET(tcp_hc_header, 9) && !BITSET(tcp_hc_header, 8)) { + /* Ack = (1|0), copy 2 bytes of tcp_hc packet and 2 bytes from + * previous packet */ + full_tcp_header.ack_nr |= NTOHS(*((uint16_t *)packet_buffer)); + full_tcp_header.ack_nr |= ((current_tcp_context->ack_rcv) & 0xFFFF0000); + packet_buffer += 2; + packet_size += 2; + SET_TCP_ACK(full_tcp_header.reserved_flags); + } + /* Sending uncompressed acknowledgment number */ + else { + /* Ack = (1|1), copy 4 bytes of tcp_hc packet */ + memcpy(&full_tcp_header.ack_nr, packet_buffer, 4); + full_tcp_header.ack_nr = NTOHL(full_tcp_header.ack_nr); + packet_buffer += 4; + packet_size += 4; + + if (header_type == COMPRESSED_HEADER) { + SET_TCP_ACK(full_tcp_header.reserved_flags); + } + } + + /*----------------------------------*/ + /*| Window handling |*/ + /*----------------------------------*/ + if (!BITSET(tcp_hc_header, 7) && !BITSET(tcp_hc_header, 6)) { + /* Wnd = (0|0), copy old value */ + memcpy(&full_tcp_header.window, ¤t_tcp_context->wnd_rcv, 2); + } + /* The 8 most significant bits haven't changed from previous packet */ + else if (!BITSET(tcp_hc_header, 7) && BITSET(tcp_hc_header, 6)) { + /* Wnd = (0|1), copy 1 byte of tcp_hc packet and 1 byte from + * previous packet */ + full_tcp_header.window |= *packet_buffer; + full_tcp_header.window |= ((current_tcp_context->wnd_rcv) & 0xFF00); + packet_buffer += 1; + packet_size += 1; + } + /* If the 8 less significant bits haven't changed from previous packet */ + else if (BITSET(tcp_hc_header, 7) && !BITSET(tcp_hc_header, 6)) { + /* Wnd = (1|0), copy 1 byte of tcp_hc packet and 1 byte from previous packet */ + full_tcp_header.window |= ((*((uint16_t *)packet_buffer)) & 0xFF00); + full_tcp_header.window |= ((current_tcp_context->wnd_rcv) & 0x00FF); + packet_buffer += 1; + packet_size += 1; + } + /* Sending uncompressed window size */ + else { + /* Wnd = (1|1), copy 2 bytes of tcp_hc packet */ + memcpy(&full_tcp_header.window, packet_buffer, 2); + full_tcp_header.window = NTOHS(full_tcp_header.window); + packet_buffer += 2; + packet_size += 2; + } + + /* FIN flag */ + if (BITSET(tcp_hc_header, 3)) { + /* F = (1) */ + if (IS_TCP_ACK(full_tcp_header.reserved_flags)) { + SET_TCP_FIN_ACK(full_tcp_header.reserved_flags); + } + else { + SET_TCP_FIN(full_tcp_header.reserved_flags); + } + } + + /* Copy checksum into into tcp header */ + memcpy(&full_tcp_header.checksum, packet_buffer, 2); + full_tcp_header.checksum = NTOHS(full_tcp_header.checksum); + packet_buffer += 2; + packet_size += 2; + + /* Copy dest. and src. port into tcp header */ + memcpy(&full_tcp_header.dst_port, + ¤t_socket->socket_values.local_address.sin6_port, 2); + memcpy(&full_tcp_header.src_port, + ¤t_socket->socket_values.foreign_address.sin6_port, 2); + + /* Ordinary TCP header length */ + full_tcp_header.dataOffset_reserved = TCP_HDR_LEN / 4; + + /* Move payload to end of tcp header */ + memmove(((uint8_t *)temp_ipv6_header) + IPV6_HDR_LEN + TCP_HDR_LEN, + packet_buffer, temp_ipv6_header->length - packet_size); + + /* Copy TCP uncompressed header in front of payload */ + memcpy(((uint8_t *)temp_ipv6_header) + IPV6_HDR_LEN, &full_tcp_header, + TCP_HDR_LEN); + + /* Set IPV6 header length */ + temp_ipv6_header->length = temp_ipv6_header->length - packet_size + + TCP_HDR_LEN; + return current_socket; + } +} + +#endif diff --git a/sys/net/destiny/tcp_hc.h b/sys/net/destiny/tcp_hc.h index 9482d3a45..b89b441f1 100644 --- a/sys/net/destiny/tcp_hc.h +++ b/sys/net/destiny/tcp_hc.h @@ -1,25 +1,25 @@ -/* - * tcp_hc.h - * - * Created on: 01.02.2012 - * Author: Oliver - */ - -#ifndef TCP_HC_H_ -#define TCP_HC_H_ - -#include "tcp.h" -#include "../sixlowpan/sixlowip.h" -#include "socket.h" - -#ifdef TCP_HC - -#define FULL_HEADER 1 -#define MOSTLY_COMPRESSED_HEADER 2 -#define COMPRESSED_HEADER 3 - -void update_tcp_hc_context(bool incoming, socket_internal_t *current_socket, tcp_hdr_t *current_tcp_packet); -uint16_t compress_tcp_packet(socket_internal_t *current_socket, uint8_t *current_tcp_packet, ipv6_hdr_t *temp_ipv6_header, uint8_t flags, uint8_t payload_length); -socket_internal_t *decompress_tcp_packet(ipv6_hdr_t *temp_ipv6_header); -#endif -#endif /* TCP_HC_H_ */ +/* + * tcp_hc.h + * + * Created on: 01.02.2012 + * Author: Oliver + */ + +#ifndef TCP_HC_H_ +#define TCP_HC_H_ + +#include "tcp.h" +#include "../sixlowpan/sixlowip.h" +#include "socket.h" + +#ifdef TCP_HC + +#define FULL_HEADER 1 +#define MOSTLY_COMPRESSED_HEADER 2 +#define COMPRESSED_HEADER 3 + +void update_tcp_hc_context(bool incoming, socket_internal_t *current_socket, tcp_hdr_t *current_tcp_packet); +uint16_t compress_tcp_packet(socket_internal_t *current_socket, uint8_t *current_tcp_packet, ipv6_hdr_t *temp_ipv6_header, uint8_t flags, uint8_t payload_length); +socket_internal_t *decompress_tcp_packet(ipv6_hdr_t *temp_ipv6_header); +#endif +#endif /* TCP_HC_H_ */ diff --git a/sys/net/destiny/tcp_timer.c b/sys/net/destiny/tcp_timer.c index c3861c8c2..431edf0f2 100644 --- a/sys/net/destiny/tcp_timer.c +++ b/sys/net/destiny/tcp_timer.c @@ -1,156 +1,156 @@ -/** - * Destiny TCP timer implementation - * - * Copyright (C) 2013 INRIA. - * - * This file subject to the terms and conditions of the GNU Lesser General - * Public License. See the file LICENSE in the top level directory for more - * details. - * - * @ingroup destiny - * @{ - * @file tcp_timer.c - * @brief TCP timer - * @author Oliver Gesch - * @} - */ - - -#include -#include -#include -#include -#include -#include "tcp_timer.h" -#include "vtimer.h" -#include "thread.h" -#include "destiny.h" -#include "socket.h" -#include "net_help/msg_help.h" -#include "../sixlowpan/sixlowpan.h" - -void handle_synchro_timeout(socket_internal_t *current_socket) -{ - msg_t send; - - if (thread_getstatus(current_socket->recv_pid) == STATUS_RECEIVE_BLOCKED) { - timex_t now; - vtimer_now(&now); - - if ((current_socket->socket_values.tcp_control.no_of_retries == 0) && - (timex_sub(now, - current_socket->socket_values.tcp_control.last_packet_time).microseconds > - TCP_SYN_INITIAL_TIMEOUT)) { - current_socket->socket_values.tcp_control.no_of_retries++; - net_msg_send(&send, current_socket->recv_pid, 0, TCP_RETRY); - } - else if ((current_socket->socket_values.tcp_control.no_of_retries > 0) && - (timex_sub(now, - current_socket->socket_values.tcp_control.last_packet_time).microseconds > - (current_socket->socket_values.tcp_control.no_of_retries * - TCP_SYN_TIMEOUT + TCP_SYN_INITIAL_TIMEOUT))) { - current_socket->socket_values.tcp_control.no_of_retries++; - - if (current_socket->socket_values.tcp_control.no_of_retries > - TCP_MAX_SYN_RETRIES) { - net_msg_send(&send, current_socket->recv_pid, 0, TCP_TIMEOUT); - } - else { - net_msg_send(&send, current_socket->recv_pid, 0, TCP_RETRY); - } - } - } -} - -void handle_established(socket_internal_t *current_socket) -{ - msg_t send; - double current_timeout = current_socket->socket_values.tcp_control.rto; - - if (current_timeout < SECOND) { - current_timeout = SECOND; - } - - uint8_t i; - - if ((current_socket->socket_values.tcp_control.send_nxt > - current_socket->socket_values.tcp_control.send_una) && - (thread_getstatus(current_socket->send_pid) == STATUS_RECEIVE_BLOCKED)) { - for (i = 0; i < current_socket->socket_values.tcp_control.no_of_retries; - i++) { - current_timeout *= 2; - } - - timex_t now; - vtimer_now(&now); - - if (current_timeout > TCP_ACK_MAX_TIMEOUT) { - net_msg_send(&send, current_socket->send_pid, 0, TCP_TIMEOUT); - } - else if (timex_sub(now, current_socket->socket_values.tcp_control.last_packet_time).microseconds > - current_timeout) { - current_socket->socket_values.tcp_control.no_of_retries++; - net_msg_send(&send, current_socket->send_pid, 0, TCP_RETRY); - } - } -} - -void check_sockets(void) -{ - socket_internal_t *current_socket; - uint8_t i = 1; - - while (i < MAX_SOCKETS + 1) { - current_socket = getSocket(i); - - if (isTCPSocket(i)) { - switch(current_socket->socket_values.tcp_control.state) { - case ESTABLISHED: { - handle_established(current_socket); - break; - } - - case SYN_SENT: { - handle_synchro_timeout(current_socket); - break; - } - - case SYN_RCVD: { - handle_synchro_timeout(current_socket); - break; - } - - default: { - break; - } - } - } - - i++; - } -} - -void inc_global_variables(void) -{ - mutex_lock(&global_sequence_clunter_mutex); - global_sequence_counter += rand(); - mutex_unlock(&global_sequence_clunter_mutex); -#ifdef TCP_HC - mutex_lock(&global_context_counter_mutex); - global_context_counter += rand(); - mutex_unlock(&global_context_counter_mutex); -#endif -} - -void tcp_general_timer(void) -{ - vtimer_t tcp_vtimer; - timex_t interval = timex_set(0, TCP_TIMER_RESOLUTION); - - while (1) { - inc_global_variables(); - check_sockets(); - vtimer_set_wakeup(&tcp_vtimer, interval, thread_getpid()); - thread_sleep(); - } -} +/** + * Destiny TCP timer implementation + * + * Copyright (C) 2013 INRIA. + * + * This file subject to the terms and conditions of the GNU Lesser General + * Public License. See the file LICENSE in the top level directory for more + * details. + * + * @ingroup destiny + * @{ + * @file tcp_timer.c + * @brief TCP timer + * @author Oliver Gesch + * @} + */ + + +#include +#include +#include +#include +#include +#include "tcp_timer.h" +#include "vtimer.h" +#include "thread.h" +#include "destiny.h" +#include "socket.h" +#include "net_help/msg_help.h" +#include "../sixlowpan/sixlowpan.h" + +void handle_synchro_timeout(socket_internal_t *current_socket) +{ + msg_t send; + + if (thread_getstatus(current_socket->recv_pid) == STATUS_RECEIVE_BLOCKED) { + timex_t now; + vtimer_now(&now); + + if ((current_socket->socket_values.tcp_control.no_of_retries == 0) && + (timex_sub(now, + current_socket->socket_values.tcp_control.last_packet_time).microseconds > + TCP_SYN_INITIAL_TIMEOUT)) { + current_socket->socket_values.tcp_control.no_of_retries++; + net_msg_send(&send, current_socket->recv_pid, 0, TCP_RETRY); + } + else if ((current_socket->socket_values.tcp_control.no_of_retries > 0) && + (timex_sub(now, + current_socket->socket_values.tcp_control.last_packet_time).microseconds > + (current_socket->socket_values.tcp_control.no_of_retries * + TCP_SYN_TIMEOUT + TCP_SYN_INITIAL_TIMEOUT))) { + current_socket->socket_values.tcp_control.no_of_retries++; + + if (current_socket->socket_values.tcp_control.no_of_retries > + TCP_MAX_SYN_RETRIES) { + net_msg_send(&send, current_socket->recv_pid, 0, TCP_TIMEOUT); + } + else { + net_msg_send(&send, current_socket->recv_pid, 0, TCP_RETRY); + } + } + } +} + +void handle_established(socket_internal_t *current_socket) +{ + msg_t send; + double current_timeout = current_socket->socket_values.tcp_control.rto; + + if (current_timeout < SECOND) { + current_timeout = SECOND; + } + + uint8_t i; + + if ((current_socket->socket_values.tcp_control.send_nxt > + current_socket->socket_values.tcp_control.send_una) && + (thread_getstatus(current_socket->send_pid) == STATUS_RECEIVE_BLOCKED)) { + for (i = 0; i < current_socket->socket_values.tcp_control.no_of_retries; + i++) { + current_timeout *= 2; + } + + timex_t now; + vtimer_now(&now); + + if (current_timeout > TCP_ACK_MAX_TIMEOUT) { + net_msg_send(&send, current_socket->send_pid, 0, TCP_TIMEOUT); + } + else if (timex_sub(now, current_socket->socket_values.tcp_control.last_packet_time).microseconds > + current_timeout) { + current_socket->socket_values.tcp_control.no_of_retries++; + net_msg_send(&send, current_socket->send_pid, 0, TCP_RETRY); + } + } +} + +void check_sockets(void) +{ + socket_internal_t *current_socket; + uint8_t i = 1; + + while (i < MAX_SOCKETS + 1) { + current_socket = getSocket(i); + + if (isTCPSocket(i)) { + switch(current_socket->socket_values.tcp_control.state) { + case ESTABLISHED: { + handle_established(current_socket); + break; + } + + case SYN_SENT: { + handle_synchro_timeout(current_socket); + break; + } + + case SYN_RCVD: { + handle_synchro_timeout(current_socket); + break; + } + + default: { + break; + } + } + } + + i++; + } +} + +void inc_global_variables(void) +{ + mutex_lock(&global_sequence_clunter_mutex); + global_sequence_counter += rand(); + mutex_unlock(&global_sequence_clunter_mutex); +#ifdef TCP_HC + mutex_lock(&global_context_counter_mutex); + global_context_counter += rand(); + mutex_unlock(&global_context_counter_mutex); +#endif +} + +void tcp_general_timer(void) +{ + vtimer_t tcp_vtimer; + timex_t interval = timex_set(0, TCP_TIMER_RESOLUTION); + + while (1) { + inc_global_variables(); + check_sockets(); + vtimer_set_wakeup(&tcp_vtimer, interval, thread_getpid()); + thread_sleep(); + } +} diff --git a/sys/net/destiny/tcp_timer.h b/sys/net/destiny/tcp_timer.h index 29556a038..1ef44352a 100644 --- a/sys/net/destiny/tcp_timer.h +++ b/sys/net/destiny/tcp_timer.h @@ -1,33 +1,33 @@ -/* - * tcp_timer.h - * - * Created on: 21.01.2012 - * Author: Oliver - */ - -#ifndef TCP_TIMER_H_ -#define TCP_TIMER_H_ - -#define TCP_TIMER_RESOLUTION 500*1000 - -#define SECOND 1000.0f*1000.0f -#define TCP_TIMER_STACKSIZE 512 -#define TCP_SYN_INITIAL_TIMEOUT 6*SECOND -#define TCP_SYN_TIMEOUT 24*SECOND -#define TCP_MAX_SYN_RETRIES 3 -#define TCP_INITIAL_ACK_TIMEOUT 3.0f*SECOND // still static, should be calculated via RTT -#define TCP_ACK_MAX_TIMEOUT 30*SECOND // TODO: Set back to 90 Seconds - -#define TCP_ALPHA 1.0f/8.0f -#define TCP_BETA 1.0f/4.0f - -#define TCP_NOT_DEFINED 0 -#define TCP_RETRY 1 -#define TCP_TIMEOUT 2 -#define TCP_CONTINUE 3 - -void tcp_general_timer(void); - -char tcp_timer_stack[TCP_TIMER_STACKSIZE]; - -#endif /* TCP_TIMER_H_ */ +/* + * tcp_timer.h + * + * Created on: 21.01.2012 + * Author: Oliver + */ + +#ifndef TCP_TIMER_H_ +#define TCP_TIMER_H_ + +#define TCP_TIMER_RESOLUTION 500*1000 + +#define SECOND 1000.0f*1000.0f +#define TCP_TIMER_STACKSIZE 512 +#define TCP_SYN_INITIAL_TIMEOUT 6*SECOND +#define TCP_SYN_TIMEOUT 24*SECOND +#define TCP_MAX_SYN_RETRIES 3 +#define TCP_INITIAL_ACK_TIMEOUT 3.0f*SECOND // still static, should be calculated via RTT +#define TCP_ACK_MAX_TIMEOUT 30*SECOND // TODO: Set back to 90 Seconds + +#define TCP_ALPHA 1.0f/8.0f +#define TCP_BETA 1.0f/4.0f + +#define TCP_NOT_DEFINED 0 +#define TCP_RETRY 1 +#define TCP_TIMEOUT 2 +#define TCP_CONTINUE 3 + +void tcp_general_timer(void); + +char tcp_timer_stack[TCP_TIMER_STACKSIZE]; + +#endif /* TCP_TIMER_H_ */ diff --git a/sys/net/destiny/udp.c b/sys/net/destiny/udp.c index f1c2618fd..175b10b3c 100644 --- a/sys/net/destiny/udp.c +++ b/sys/net/destiny/udp.c @@ -1,77 +1,77 @@ -/** - * Destiny UDP implementation - * - * Copyright (C) 2013 INRIA. - * - * This file subject to the terms and conditions of the GNU Lesser General - * Public License. See the file LICENSE in the top level directory for more - * details. - * - * @ingroup destiny - * @{ - * @file udp.c - * @brief UDP implementation - * @author Oliver Gesch - * @} - */ - - -#include -#include -#include - -#include "udp.h" -#include "msg.h" -#include "../sixlowpan/sixlowip.h" -#include "../sixlowpan/sixlowpan.h" -#include "socket.h" -#include "in.h" -#include "../net_help/net_help.h" -#include "../net_help/msg_help.h" - -uint16_t udp_csum(ipv6_hdr_t *ipv6_header, udp_hdr_t *udp_header) -{ - uint16_t sum; - uint16_t len = udp_header->length; - - sum = len + IPPROTO_UDP; - sum = csum(sum, (uint8_t *)&ipv6_header->srcaddr, 2 * sizeof(ipv6_addr_t)); - sum = csum(sum, (uint8_t *)udp_header, len); - return (sum == 0) ? 0xffff : HTONS(sum); -} - -void udp_packet_handler(void) -{ - msg_t m_recv_ip, m_send_ip, m_recv_udp, m_send_udp; - ipv6_hdr_t *ipv6_header; - udp_hdr_t *udp_header; - uint8_t *payload; - socket_internal_t *udp_socket = NULL; - uint16_t chksum; - - while (1) { - msg_receive(&m_recv_ip); - ipv6_header = ((ipv6_hdr_t *)m_recv_ip.content.ptr); - udp_header = ((udp_hdr_t *)(m_recv_ip.content.ptr + IPV6_HDR_LEN)); - payload = (uint8_t *)(m_recv_ip.content.ptr + IPV6_HDR_LEN + UDP_HDR_LEN); - - chksum = udp_csum(ipv6_header, udp_header); - - if (chksum == 0xffff) { - udp_socket = get_udp_socket(ipv6_header, udp_header); - - if (udp_socket != NULL) { - m_send_udp.content.ptr = (char *)ipv6_header; - msg_send_receive(&m_send_udp, &m_recv_udp, udp_socket->recv_pid); - } - else { - printf("Dropped UDP Message because no thread ID was found for delivery!\n"); - } - } - else { - printf("Wrong checksum (%x)!\n", chksum); - } - - msg_reply(&m_recv_ip, &m_send_ip); - } -} +/** + * Destiny UDP implementation + * + * Copyright (C) 2013 INRIA. + * + * This file subject to the terms and conditions of the GNU Lesser General + * Public License. See the file LICENSE in the top level directory for more + * details. + * + * @ingroup destiny + * @{ + * @file udp.c + * @brief UDP implementation + * @author Oliver Gesch + * @} + */ + + +#include +#include +#include + +#include "udp.h" +#include "msg.h" +#include "../sixlowpan/sixlowip.h" +#include "../sixlowpan/sixlowpan.h" +#include "socket.h" +#include "in.h" +#include "../net_help/net_help.h" +#include "../net_help/msg_help.h" + +uint16_t udp_csum(ipv6_hdr_t *ipv6_header, udp_hdr_t *udp_header) +{ + uint16_t sum; + uint16_t len = udp_header->length; + + sum = len + IPPROTO_UDP; + sum = csum(sum, (uint8_t *)&ipv6_header->srcaddr, 2 * sizeof(ipv6_addr_t)); + sum = csum(sum, (uint8_t *)udp_header, len); + return (sum == 0) ? 0xffff : HTONS(sum); +} + +void udp_packet_handler(void) +{ + msg_t m_recv_ip, m_send_ip, m_recv_udp, m_send_udp; + ipv6_hdr_t *ipv6_header; + udp_hdr_t *udp_header; + uint8_t *payload; + socket_internal_t *udp_socket = NULL; + uint16_t chksum; + + while (1) { + msg_receive(&m_recv_ip); + ipv6_header = ((ipv6_hdr_t *)m_recv_ip.content.ptr); + udp_header = ((udp_hdr_t *)(m_recv_ip.content.ptr + IPV6_HDR_LEN)); + payload = (uint8_t *)(m_recv_ip.content.ptr + IPV6_HDR_LEN + UDP_HDR_LEN); + + chksum = udp_csum(ipv6_header, udp_header); + + if (chksum == 0xffff) { + udp_socket = get_udp_socket(ipv6_header, udp_header); + + if (udp_socket != NULL) { + m_send_udp.content.ptr = (char *)ipv6_header; + msg_send_receive(&m_send_udp, &m_recv_udp, udp_socket->recv_pid); + } + else { + printf("Dropped UDP Message because no thread ID was found for delivery!\n"); + } + } + else { + printf("Wrong checksum (%x)!\n", chksum); + } + + msg_reply(&m_recv_ip, &m_send_ip); + } +} diff --git a/sys/net/destiny/udp.h b/sys/net/destiny/udp.h index 23efcade9..e5da55db8 100644 --- a/sys/net/destiny/udp.h +++ b/sys/net/destiny/udp.h @@ -1,44 +1,44 @@ -/** - * Destiny TCP header - * - * Copyright (C) 2013 INRIA. - * - * This file subject to the terms and conditions of the GNU Lesser General - * Public License. See the file LICENSE in the top level directory for more - * details. - * - * @ingroup destiny - * @{ - * @file udp.c - * @brief UDP data structs and prototypes - * @author Oliver Gesch - * @} - */ - -/* - * udp.h - * - * Created on: 05.09.2011 - * Author: Oliver - */ - -#ifndef UDP_H_ -#define UDP_H_ - -#define UDP_HDR_LEN 8 - -#define UDP_STACK_SIZE 512 - -#include "../sixlowpan/sixlowip.h" - -typedef struct __attribute__((packed)) udp_h_t { - uint16_t src_port; - uint16_t dst_port; - uint16_t length; - uint16_t checksum; -} udp_hdr_t; - -uint16_t udp_csum(ipv6_hdr_t *ipv6_header, udp_hdr_t *udp_header); -void udp_packet_handler(void); - -#endif /* UDP_H_ */ +/** + * Destiny TCP header + * + * Copyright (C) 2013 INRIA. + * + * This file subject to the terms and conditions of the GNU Lesser General + * Public License. See the file LICENSE in the top level directory for more + * details. + * + * @ingroup destiny + * @{ + * @file udp.c + * @brief UDP data structs and prototypes + * @author Oliver Gesch + * @} + */ + +/* + * udp.h + * + * Created on: 05.09.2011 + * Author: Oliver + */ + +#ifndef UDP_H_ +#define UDP_H_ + +#define UDP_HDR_LEN 8 + +#define UDP_STACK_SIZE 512 + +#include "../sixlowpan/sixlowip.h" + +typedef struct __attribute__((packed)) udp_h_t { + uint16_t src_port; + uint16_t dst_port; + uint16_t length; + uint16_t checksum; +} udp_hdr_t; + +uint16_t udp_csum(ipv6_hdr_t *ipv6_header, udp_hdr_t *udp_header); +void udp_packet_handler(void); + +#endif /* UDP_H_ */ diff --git a/sys/net/net_help/msg_help.c b/sys/net/net_help/msg_help.c index c490ec738..adcd924d6 100644 --- a/sys/net/net_help/msg_help.c +++ b/sys/net/net_help/msg_help.c @@ -1,44 +1,44 @@ -/* - * msg_help.c - * - * Created on: 24.11.2011 - * Author: Oliver - */ - -#include -#include -#include "msg_help.h" -#include "sys/net/destiny/tcp_timer.h" - -void block_continue_thread(void) -{ - // msg_t recv_m; - // recv_m.type = TCP_NOT_DEFINED; - // while (recv_m.type != TCP_CONTINUE) - // { - // net_msg_receive(&recv_m); - // } -} - -int net_msg_receive(msg_t *m) -{ - return msg_receive(m); -} - -int net_msg_reply(msg_t *m, msg_t *reply, uint16_t message) -{ - reply->type = message; - return msg_reply(m, reply); -} - -int net_msg_send(msg_t *m, unsigned int pid, bool block, uint16_t message) -{ - m->type = message; - return msg_send(m, pid, block); -} - -int net_msg_send_recv(msg_t *m, msg_t *reply, unsigned int pid, uint16_t message) -{ - m->type = message; - return msg_send_receive(m, reply, pid);; -} +/* + * msg_help.c + * + * Created on: 24.11.2011 + * Author: Oliver + */ + +#include +#include +#include "msg_help.h" +#include "sys/net/destiny/tcp_timer.h" + +void block_continue_thread(void) +{ + // msg_t recv_m; + // recv_m.type = TCP_NOT_DEFINED; + // while (recv_m.type != TCP_CONTINUE) + // { + // net_msg_receive(&recv_m); + // } +} + +int net_msg_receive(msg_t *m) +{ + return msg_receive(m); +} + +int net_msg_reply(msg_t *m, msg_t *reply, uint16_t message) +{ + reply->type = message; + return msg_reply(m, reply); +} + +int net_msg_send(msg_t *m, unsigned int pid, bool block, uint16_t message) +{ + m->type = message; + return msg_send(m, pid, block); +} + +int net_msg_send_recv(msg_t *m, msg_t *reply, unsigned int pid, uint16_t message) +{ + m->type = message; + return msg_send_receive(m, reply, pid);; +} diff --git a/sys/net/net_help/msg_help.h b/sys/net/net_help/msg_help.h index f0c5aa180..37993d243 100644 --- a/sys/net/net_help/msg_help.h +++ b/sys/net/net_help/msg_help.h @@ -1,35 +1,35 @@ -/* - * msg_help.h - * - * Created on: 24.11.2011 - * Author: Oliver - */ - -#ifndef MSG_HELP_H_ -#define MSG_HELP_H_ - -// Function IDs -#define FID_SIXLOWIP_TCP 0 -#define FID_SIXLOWIP_UDP 1 -#define FID_TCP_PH 2 -#define FID_UDP_PH 3 -#define FID_H_PAYLOAD 4 -#define FID_SOCKET_RECV 5 -#define FID_SOCKET_RECV_FROM 6 -#define FID_TCP_SYN_ACK 7 -#define FID_SOCKET_CONNECT 8 -#define FID_SOCKET_HANDLE_NEW_TCP_CON 9 -#define FID_TCP_ACK 10 -#define FID_SOCKET_CLOSE 11 -#define FID_TCP_CHT 12 -#define FID_TCP_SHELL 13 - -#define RETURNNOW 4000 - -void block_continue_thread(void); -int net_msg_receive(msg_t *m); -int net_msg_reply(msg_t *m, msg_t *reply, uint16_t message); -int net_msg_send(msg_t *m, unsigned int pid, bool block, uint16_t message); -int net_msg_send_recv(msg_t *m, msg_t *reply, unsigned int pid, uint16_t message); - -#endif /* MSG_HELP_H_ */ +/* + * msg_help.h + * + * Created on: 24.11.2011 + * Author: Oliver + */ + +#ifndef MSG_HELP_H_ +#define MSG_HELP_H_ + +// Function IDs +#define FID_SIXLOWIP_TCP 0 +#define FID_SIXLOWIP_UDP 1 +#define FID_TCP_PH 2 +#define FID_UDP_PH 3 +#define FID_H_PAYLOAD 4 +#define FID_SOCKET_RECV 5 +#define FID_SOCKET_RECV_FROM 6 +#define FID_TCP_SYN_ACK 7 +#define FID_SOCKET_CONNECT 8 +#define FID_SOCKET_HANDLE_NEW_TCP_CON 9 +#define FID_TCP_ACK 10 +#define FID_SOCKET_CLOSE 11 +#define FID_TCP_CHT 12 +#define FID_TCP_SHELL 13 + +#define RETURNNOW 4000 + +void block_continue_thread(void); +int net_msg_receive(msg_t *m); +int net_msg_reply(msg_t *m, msg_t *reply, uint16_t message); +int net_msg_send(msg_t *m, unsigned int pid, bool block, uint16_t message); +int net_msg_send_recv(msg_t *m, msg_t *reply, unsigned int pid, uint16_t message); + +#endif /* MSG_HELP_H_ */ diff --git a/sys/net/net_help/net_help.c b/sys/net/net_help/net_help.c index 977838ea5..c0952b563 100644 --- a/sys/net/net_help/net_help.c +++ b/sys/net/net_help/net_help.c @@ -1,61 +1,61 @@ -/* - * common.c - * - * Created on: 05.10.2011 - * Author: Oliver - */ - -#include -#include -#include - -#include "net_help.h" - -void printArrayRange(uint8_t *array, uint16_t len, char *str) -{ - int i = 0; - printf("-------------%s-------------\n", str); - - for (i = 0; i < len; i++) { - printf("%#x ", *(array + i)); - } - - printf("\n-----------%u-------------\n", len); -} - -uint16_t csum(uint16_t sum, uint8_t *buf, uint16_t len) -{ - int count; - uint16_t carry; - - count = len >> 1; - - if (count) { - if (count) { - carry = 0; - - do { - uint16_t t = (*buf << 8) + *(buf + 1); - count--; - buf += 2; - sum += carry; - sum += t; - carry = (t > sum); - } - while (count); - - sum += carry; - } - } - - if (len & 1) { - uint16_t u = (*buf << 8); - sum += (*buf << 8); - - if (sum < u) { - sum++; - } - } - - return sum; -} +/* + * common.c + * + * Created on: 05.10.2011 + * Author: Oliver + */ + +#include +#include +#include + +#include "net_help.h" + +void printArrayRange(uint8_t *array, uint16_t len, char *str) +{ + int i = 0; + printf("-------------%s-------------\n", str); + + for (i = 0; i < len; i++) { + printf("%#x ", *(array + i)); + } + + printf("\n-----------%u-------------\n", len); +} + +uint16_t csum(uint16_t sum, uint8_t *buf, uint16_t len) +{ + int count; + uint16_t carry; + + count = len >> 1; + + if (count) { + if (count) { + carry = 0; + + do { + uint16_t t = (*buf << 8) + *(buf + 1); + count--; + buf += 2; + sum += carry; + sum += t; + carry = (t > sum); + } + while (count); + + sum += carry; + } + } + + if (len & 1) { + uint16_t u = (*buf << 8); + sum += (*buf << 8); + + if (sum < u) { + sum++; + } + } + + return sum; +} diff --git a/sys/net/net_help/net_help.h b/sys/net/net_help/net_help.h index 54aabe1a9..8db17e7d5 100644 --- a/sys/net/net_help/net_help.h +++ b/sys/net/net_help/net_help.h @@ -1,27 +1,27 @@ -/* - * common.h - * - * Created on: 05.10.2011 - * Author: Oliver - */ - -#ifndef COMMON_H_ -#define COMMON_H_ -#include -#include - -#define BITSET(var,pos) ((var) & (1<<(pos))) -#define HTONS(a) ((((uint16_t) (a) >> 8) & 0xff) | ((((uint16_t) (a)) & 0xff) << 8)) -#define HTONL(a) ((((uint32_t) (a) & 0xff000000) >> 24) | \ - (((uint32_t) (a) & 0x00ff0000) >> 8) | \ - (((uint32_t) (a) & 0x0000ff00) << 8) | \ - (((uint32_t) (a) & 0x000000ff) << 24)) -#define NTOHS HTONS -#define NTOHL HTONL - -#define CMP_IPV6_ADDR(a, b) (memcmp(a, b, 16)) - -uint16_t csum(uint16_t sum, uint8_t *buf, uint16_t len); -void printArrayRange(uint8_t *array, uint16_t len, char *str); - -#endif /* COMMON_H_ */ +/* + * common.h + * + * Created on: 05.10.2011 + * Author: Oliver + */ + +#ifndef COMMON_H_ +#define COMMON_H_ +#include +#include + +#define BITSET(var,pos) ((var) & (1<<(pos))) +#define HTONS(a) ((((uint16_t) (a) >> 8) & 0xff) | ((((uint16_t) (a)) & 0xff) << 8)) +#define HTONL(a) ((((uint32_t) (a) & 0xff000000) >> 24) | \ + (((uint32_t) (a) & 0x00ff0000) >> 8) | \ + (((uint32_t) (a) & 0x0000ff00) << 8) | \ + (((uint32_t) (a) & 0x000000ff) << 24)) +#define NTOHS HTONS +#define NTOHL HTONL + +#define CMP_IPV6_ADDR(a, b) (memcmp(a, b, 16)) + +uint16_t csum(uint16_t sum, uint8_t *buf, uint16_t len); +void printArrayRange(uint8_t *array, uint16_t len, char *str); + +#endif /* COMMON_H_ */