Girts Folkmanis b9744f698f cortexm_common: don't try to set MEMFAULTENA on ARMv6-M ... Before this change, if one tried to build a Cortex-M0+ target that had an MPU, compilation would fail due to missing 'SCB_SHCSR_MEMFAULTENA_Msk' in SCB structure. Cortex-M0+ is a ARMv6-M arch (unlike most other targets that have MPU support). ARMv6-M has more limited support for fault conditions, see ARMv6-M Architecture Reference Manual, D3.6.2.		2018-03-12 19:57:29 -07:00
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include	cpu/cortexm_common: add NOP after WFI to avoid hardfault on stm32l152	2018-02-12 15:10:34 +01:00
ldscripts	cpu/cortexm_common/ldscripts: add common linker script for cortexm family	2017-11-07 15:05:43 +01:00
periph	cpu: cortexm: provide periph_pm for all cortexm	2017-11-06 12:01:19 +01:00
cortexm_init.c	cpu/cortexm: set VTOR for selected M0+ CPUs	2017-06-02 11:53:59 +02:00
irq_arch.c	cpu: adapt to COREIF_NG removal	2017-11-16 14:40:16 +01:00
Makefile	cpu: cortexm: fix LTO issue for shared vector table (see #5774)	2017-10-20 22:19:44 +02:00
Makefile.features	cpu: cortexm: provide periph_pm for all cortexm	2017-11-06 12:01:19 +01:00
Makefile.include	cpu/cortexm_common/Makefile.include: define linker length vars if set	2017-11-07 15:05:43 +01:00
mpu.c	cortexm_common: don't try to set MEMFAULTENA on ARMv6-M	2018-03-12 19:57:29 -07:00
panic.c	cpu/cortexm: removed unused pm include in panic.c	2017-01-19 11:05:44 +01:00
thread_arch.c	core, cpu: rename thread_start_threading() -> cpu_switch_context_exit()	2017-11-16 14:40:16 +01:00
vectors_cortexm.c	cortexm_common: Correct offset for hardfault stack	2017-10-30 07:08:33 +01:00