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samd21/cpu DFLL lock loop error

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This commit is contained in:
Dan Evans 2018-01-23 16:24:17 -07:00
parent aaabbdd1d3
commit 0f011d53de
1 changed files with 4 additions and 5 deletions
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9
cpu/samd21/cpu.c
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@ -161,11 +161,10 @@ static void clk_init(void)
}
SYSCTRL->DFLLCTRL.bit.ENABLE = 1;
while ((SYSCTRL->PCLKSR.reg & (SYSCTRL_PCLKSR_DFLLRDY |
SYSCTRL_PCLKSR_DFLLLCKF |
SYSCTRL_PCLKSR_DFLLLCKC)) == 0) {
/* Wait for DFLLLXXX sync */
}
uint32_t mask = SYSCTRL_PCLKSR_DFLLRDY |
SYSCTRL_PCLKSR_DFLLLCKF |
SYSCTRL_PCLKSR_DFLLLCKC;
while ((SYSCTRL->PCLKSR.reg & mask) != mask) { } /* Wait for DFLL lock */
/* select the DFLL as source for clock generator 0 (CPU core clock) */
GCLK->GENDIV.reg = (GCLK_GENDIV_DIV(1U) | GCLK_GENDIV_ID(0));