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https://github.com/gosticks/RIOT.git
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120 lines
2.7 KiB
C
120 lines
2.7 KiB
C
/*
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* Copyright (C) 2019 Ludwig Maximilian Universität
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_cc3200
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* @{
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*
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* @file
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* @brief CPU specific definitions and functions for peripheral
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*
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* @author Wladislaw Meixner <wladislaw.meixner@campus.lmu.de>
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*/
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#include "cpu.h"
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#include "periph_conf.h"
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#include <stdbool.h>
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#include <stdint.h>
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#ifndef PERIPH_CPU_H
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#define PERIPH_CPU_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief convert x usecs to cpu cycles
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*
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*/
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#define USEC_TO_CPU_CYCLES(x) ((CLOCK_CORECLOCK / 1000000) * x)
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/**
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* @brief delay CPU for x uSec. UtilsDelay uses a loop that takes 3 cycles to
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* complete. Therefore the uSec time needs to be divided by 3.
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*
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*/
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#define USEC_DELAY(x) ROM_UtilsDelay(USEC_TO_CPU_CYCLES(x) / 3)
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/**
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* @brief Starting offset of CPU_ID
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*/
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#define CPUID_ADDR (void *)(0xe000ed00)
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/**
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* @brief Length of the CPU_ID in octets
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*/
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#define CPUID_LEN (6U)
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/**
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* @brief holds the current hibernation state of the MCU. READONLY and reading
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* requires a delay of PRCM_OP_DELAY
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*
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*/
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#define HIBERNATION_WAKE_STATUS_REG \
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(*((volatile uint32_t *)(HIB3P3_BASE + HIB3P3_O_MEM_HIB_WAKE_STATUS)))
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/**
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* @name Power management configuration
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* @{
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*/
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#define PROVIDES_PM_SET_LOWEST
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/** @} */
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/**
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* @brief SPI device configuration
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* @{
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*/
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typedef struct {
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uint32_t base_addr; /**< bus address */
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gpio_t gpio_port; /**< GPIO port */
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spi_pins_t pins; /**< pin configuration */
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uint32_t config; /**< SPI config */
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} spi_conf_t;
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/** @} */
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/**
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* @brief Timer configuration
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*
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* General purpose timers (GPT[0-3]) are configured consecutively and in order
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* (without gaps) starting from GPT0, i.e. if multiple timers are enabled.
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*/
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typedef struct {
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uint8_t chn; /**< number of channels */
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uint8_t cfg; /**< timer config word */
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} timer_conf_t;
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/**
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* @brief Declare needed generic SPI functions.
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* @{
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*/
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#define PERIPH_SPI_NEEDS_INIT_CS
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#define PERIPH_SPI_NEEDS_TRANSFER_REG
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#define PERIPH_SPI_NEEDS_TRANSFER_REGS
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/** @} */
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/**
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* @name UART device configuration
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* @{
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*/
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typedef struct {
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cc3200_uart_t *dev; /**< pointer to the used UART device */
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gpio_t pin_tx; /**< pin used for TX */
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gpio_t pin_rx; /**< pin used for RX */
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gpio_t cts_pin; /**< CTS pin - set to GPIO_UNDEF when not using */
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gpio_t rts_pin; /**< RTS pin - set to GPIO_UNDEF when not using */
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gpio_t irqn; /**< Interrupt code */
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} uart_conf_t;
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_H */
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/** @} */
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